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Circuit IR Compilers and Tools
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handshake-runner
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Talks and Related Publications
Getting Started
Code Documentation
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CommandGuide
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handshake-runner
Dialects
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'calyx' Dialect
'chirrtl' Dialect
'comb' Dialect
'esi' Dialect
'firrtl' Dialect
'fsm' Dialect
'handshake' Dialect
'hw' Dialect
'llhd' Dialect
'moore' Dialect
'msft' Dialect
'seq' Dialect
'staticlogic' Dialect
'sv' Dialect
ESI
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ESI cosimulation model
ESI data types and communication types
ESI Global Services
ESI Software APIs
Miscellaneous Notes
`comb` Dialect Rationale
CIRCT Charter
FIRRTL Annotations
FIRRTL Dialect Rationale
FSM Dialect Rationale
Getting Started with the CIRCT Project
Handshake Dialect Rationale
HW Dialect Rationale
Passes
PyCDE
Seq(uential) Dialect Rationale
Static scheduling infrastructure
SV Dialect Rationale
Symbol and Inner Symbol Rationale
The Elastic Silicon Interconnect dialect
Using the Python Bindings
Verilog and SystemVerilog Generation
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