Inheritance diagram for serialization_probes.SignProbe13:

Collaboration diagram for serialization_probes.SignProbe13:

Public Member Functions
	construct (ports)

Static Public Attributes
	clk = Clock()

	rst = Reset()

Detailed Description

Function ``sign_probe13``: si13 -> {plus_one: si13, neg: si13, sign_bit: ui1}.

The non-byte-aligned cousin of :class:`SignProbe`. si13 occupies a 2-byte
wire slot but only bit 12 carries the sign, with bits 13..15 acting as
padding. A host that:

  - uses bit 15 (instead of bit 12) as the sign bit, or
  - forgets to sign-extend the padding bits on read, or
  - leaves uninitialised garbage in the padding bits on write,

will produce wrong ``plus_one`` / ``neg`` values for negative inputs and
for inputs near the si13 boundaries (-4096 / 4095). This catches
width-bounded sign-extension bugs that si16 would never trip.

Definition at line 178 of file serialization_probes.py.

Member Function Documentation

◆ construct()

serialization_probes.SignProbe13.construct ( ports )

Definition at line 198 of file serialization_probes.py.

References wrap().

Member Data Documentation

◆ clk

serialization_probes.SignProbe13.clk = Clock()

static

Definition at line 194 of file serialization_probes.py.

Referenced by esiaccel.bsp.common.ESI_Manifest_ROM_Wrapper.build().

◆ rst

serialization_probes.SignProbe13.rst = Reset()

static

Definition at line 195 of file serialization_probes.py.

The documentation for this class was generated from the following file:

/home/runner/work/circt-www/circt-www/circt_src/lib/Dialect/ESI/runtime/tests/integration/hw/serialization_probes.py