Inheritance diagram for test_codegen.TypedWriteChannelByte:

Collaboration diagram for test_codegen.TypedWriteChannelByte:

Public Member Functions
	construct (ports)

Static Public Attributes
	clk = Clock()

	rst = Reset()

Detailed Description

From-host channel of ``ui8``: TypedWritePort + MMIO accumulator readback.

Hardware accepts every byte and XORs each one into a running register; the
latest XOR-accumulator value is exposed via the ``accumulator`` MMIO read
region so the driver can assert what it sent actually arrived. An always-
ready receiver is fine here because the test sends a small known sequence.

Definition at line 239 of file test_codegen.py.

Member Function Documentation

◆ construct()

test_codegen.TypedWriteChannelByte.construct ( ports )

Definition at line 252 of file test_codegen.py.

Member Data Documentation

◆ clk

test_codegen.TypedWriteChannelByte.clk = Clock()

static

Definition at line 248 of file test_codegen.py.

Referenced by esiaccel.bsp.common.ESI_Manifest_ROM_Wrapper.build().

◆ rst

test_codegen.TypedWriteChannelByte.rst = Reset()

static

Definition at line 249 of file test_codegen.py.

The documentation for this class was generated from the following file:

/home/runner/work/circt-www/circt-www/circt_src/lib/Dialect/ESI/runtime/tests/integration/hw/test_codegen.py