16#include "mlir/IR/Builders.h"
17#include "mlir/IR/DialectImplementation.h"
18#include "llvm/ADT/SmallString.h"
29ConstantOp::inferReturnTypes(MLIRContext *context, std::optional<Location> loc,
30 ValueRange operands, DictionaryAttr attributes,
31 OpaqueProperties properties, RegionRange regions,
32 SmallVectorImpl<Type> &inferredReturnTypes) {
33 inferredReturnTypes.push_back(
34 properties.as<Properties *>()->getValue().getType());
38OpFoldResult ConstantOp::fold(FoldAdaptor adaptor) {
return getValueAttr(); }
44LogicalResult SequenceOp::verifyRegions() {
45 if (TypeRange(getSequenceType().getElementTypes()) !=
46 getBody()->getArgumentTypes())
47 return emitOpError(
"sequence type does not match block argument types");
52ParseResult SequenceOp::parse(OpAsmParser &parser, OperationState &result) {
54 if (parser.parseSymbolName(
55 result.getOrAddProperties<SequenceOp::Properties>().sym_name))
59 SmallVector<OpAsmParser::Argument> arguments;
60 if (parser.parseArgumentList(arguments, OpAsmParser::Delimiter::Paren,
64 SmallVector<Type> argTypes;
65 SmallVector<Location> argLocs;
66 argTypes.reserve(arguments.size());
67 argLocs.reserve(arguments.size());
68 for (
auto &arg : arguments) {
69 argTypes.push_back(arg.type);
70 argLocs.push_back(arg.sourceLoc ? *arg.sourceLoc : result.location);
72 Type type = SequenceType::get(result.getContext(), argTypes);
73 result.getOrAddProperties<SequenceOp::Properties>().sequenceType =
76 auto loc = parser.getCurrentLocation();
77 if (parser.parseOptionalAttrDictWithKeyword(result.attributes))
79 if (failed(verifyInherentAttrs(result.name, result.attributes, [&]() {
80 return parser.emitError(loc)
81 <<
"'" << result.name.getStringRef() <<
"' op ";
85 std::unique_ptr<Region> bodyRegionRegion = std::make_unique<Region>();
86 if (parser.parseRegion(*bodyRegionRegion, arguments))
89 if (bodyRegionRegion->empty()) {
90 bodyRegionRegion->emplaceBlock();
91 bodyRegionRegion->addArguments(argTypes, argLocs);
93 result.addRegion(std::move(bodyRegionRegion));
98void SequenceOp::print(OpAsmPrinter &p) {
100 p.printSymbolName(getSymNameAttr().getValue());
102 llvm::interleaveComma(getBody()->getArguments(), p,
103 [&](
auto arg) { p.printRegionArgument(arg); });
105 p.printOptionalAttrDictWithKeyword(
106 (*this)->getAttrs(), {getSymNameAttrName(), getSequenceTypeAttrName()});
108 p.printRegion(getBodyRegion(),
false);
116GetSequenceOp::verifySymbolUses(SymbolTableCollection &symbolTable) {
118 symbolTable.lookupNearestSymbolFrom<SequenceOp>(*
this, getSequenceAttr());
121 <<
"'" << getSequence()
122 <<
"' does not reference a valid 'rtg.sequence' operation";
124 if (
seq.getSequenceType() != getType())
125 return emitOpError(
"referenced 'rtg.sequence' op's type does not match");
134LogicalResult SubstituteSequenceOp::verify() {
135 if (getReplacements().
empty())
136 return emitOpError(
"must at least have one replacement value");
138 if (getReplacements().size() >
139 getSequence().getType().getElementTypes().size())
141 "must not have more replacement values than sequence arguments");
143 if (getReplacements().getTypes() !=
144 getSequence().getType().getElementTypes().take_front(
145 getReplacements().size()))
146 return emitOpError(
"replacement types must match the same number of "
147 "sequence argument types from the front");
152LogicalResult SubstituteSequenceOp::inferReturnTypes(
153 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
154 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
155 SmallVectorImpl<Type> &inferredReturnTypes) {
156 ArrayRef<Type> argTypes =
157 cast<SequenceType>(operands[0].getType()).getElementTypes();
159 SequenceType::get(context, argTypes.drop_front(operands.size() - 1));
160 inferredReturnTypes.push_back(seqType);
164ParseResult SubstituteSequenceOp::parse(::mlir::OpAsmParser &parser,
165 ::mlir::OperationState &result) {
166 OpAsmParser::UnresolvedOperand sequenceRawOperand;
167 SmallVector<OpAsmParser::UnresolvedOperand, 4> replacementsOperands;
168 Type sequenceRawType;
170 if (parser.parseOperand(sequenceRawOperand) || parser.parseLParen())
173 auto replacementsOperandsLoc = parser.getCurrentLocation();
174 if (parser.parseOperandList(replacementsOperands) || parser.parseRParen() ||
175 parser.parseColon() || parser.parseType(sequenceRawType) ||
176 parser.parseOptionalAttrDict(result.attributes))
179 if (!isa<SequenceType>(sequenceRawType))
180 return parser.emitError(parser.getNameLoc())
181 <<
"'sequence' must be handle to a sequence or sequence family, but "
185 if (parser.resolveOperand(sequenceRawOperand, sequenceRawType,
189 if (parser.resolveOperands(replacementsOperands,
190 cast<SequenceType>(sequenceRawType)
192 .take_front(replacementsOperands.size()),
193 replacementsOperandsLoc, result.operands))
196 SmallVector<Type> inferredReturnTypes;
197 if (failed(inferReturnTypes(
198 parser.getContext(), result.location, result.operands,
199 result.attributes.getDictionary(parser.getContext()),
200 result.getRawProperties(), result.regions, inferredReturnTypes)))
203 result.addTypes(inferredReturnTypes);
207void SubstituteSequenceOp::print(OpAsmPrinter &p) {
208 p <<
' ' << getSequence() <<
"(" << getReplacements()
209 <<
") : " << getSequence().getType();
210 p.printOptionalAttrDict((*this)->getAttrs(), {});
217LogicalResult InterleaveSequencesOp::verify() {
218 if (getSequences().
empty())
219 return emitOpError(
"must have at least one sequence in the list");
224OpFoldResult InterleaveSequencesOp::fold(FoldAdaptor adaptor) {
225 if (getSequences().size() == 1)
226 return getSequences()[0];
235ParseResult SetCreateOp::parse(OpAsmParser &parser, OperationState &result) {
236 llvm::SmallVector<OpAsmParser::UnresolvedOperand, 16> operands;
239 if (parser.parseOperandList(operands) ||
240 parser.parseOptionalAttrDict(result.attributes) || parser.parseColon() ||
241 parser.parseType(elemType))
244 result.addTypes({SetType::get(result.getContext(), elemType)});
246 for (
auto operand : operands)
247 if (parser.resolveOperand(operand, elemType, result.operands))
253void SetCreateOp::print(OpAsmPrinter &p) {
255 p.printOperands(getElements());
256 p.printOptionalAttrDict((*this)->getAttrs());
257 p <<
" : " << getSet().getType().getElementType();
260LogicalResult SetCreateOp::verify() {
261 if (getElements().size() > 0) {
264 if (getElements()[0].getType() != getSet().getType().getElementType())
265 return emitOpError() <<
"operand types must match set element type";
275LogicalResult SetCartesianProductOp::inferReturnTypes(
276 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
277 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
278 SmallVectorImpl<Type> &inferredReturnTypes) {
279 if (operands.empty()) {
281 return mlir::emitError(*loc) <<
"at least one set must be provided";
285 SmallVector<Type> elementTypes;
286 for (
auto operand : operands)
287 elementTypes.push_back(cast<SetType>(operand.getType()).getElementType());
288 inferredReturnTypes.push_back(
289 SetType::get(rtg::TupleType::get(context, elementTypes)));
297ParseResult BagCreateOp::parse(OpAsmParser &parser, OperationState &result) {
298 llvm::SmallVector<OpAsmParser::UnresolvedOperand, 16> elementOperands,
302 if (!parser.parseOptionalLParen()) {
304 OpAsmParser::UnresolvedOperand elementOperand, multipleOperand;
305 if (parser.parseOperand(multipleOperand) || parser.parseKeyword(
"x") ||
306 parser.parseOperand(elementOperand))
309 elementOperands.push_back(elementOperand);
310 multipleOperands.push_back(multipleOperand);
312 if (parser.parseOptionalComma()) {
313 if (parser.parseRParen())
320 if (parser.parseColon() || parser.parseType(elemType) ||
321 parser.parseOptionalAttrDict(result.attributes))
324 result.addTypes({BagType::get(result.getContext(), elemType)});
326 for (
auto operand : elementOperands)
327 if (parser.resolveOperand(operand, elemType, result.operands))
330 for (
auto operand : multipleOperands)
331 if (parser.resolveOperand(operand, IndexType::
get(result.getContext()),
338void BagCreateOp::print(OpAsmPrinter &p) {
340 if (!getElements().
empty())
342 llvm::interleaveComma(llvm::zip(getElements(), getMultiples()), p,
343 [&](
auto elAndMultiple) {
344 auto [el, multiple] = elAndMultiple;
345 p << multiple <<
" x " << el;
347 if (!getElements().
empty())
350 p <<
" : " << getBag().getType().getElementType();
351 p.printOptionalAttrDict((*this)->getAttrs());
354LogicalResult BagCreateOp::verify() {
355 if (!llvm::all_equal(getElements().getTypes()))
356 return emitOpError() <<
"types of all elements must match";
358 if (getElements().size() > 0)
359 if (getElements()[0].getType() != getBag().getType().getElementType())
360 return emitOpError() <<
"operand types must match bag element type";
369LogicalResult TupleCreateOp::inferReturnTypes(
370 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
371 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
372 SmallVectorImpl<Type> &inferredReturnTypes) {
373 SmallVector<Type> elementTypes;
374 for (
auto operand : operands)
375 elementTypes.push_back(operand.getType());
376 inferredReturnTypes.push_back(rtg::TupleType::get(context, elementTypes));
384LogicalResult TupleExtractOp::inferReturnTypes(
385 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
386 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
387 SmallVectorImpl<Type> &inferredReturnTypes) {
388 assert(operands.size() == 1 &&
"must have exactly one operand");
390 auto tupleTy = dyn_cast<rtg::TupleType>(operands[0].getType());
391 size_t idx = properties.as<Properties *>()->getIndex().getInt();
394 return mlir::emitError(*loc) <<
"only RTG tuples are supported";
398 if (tupleTy.getFieldTypes().size() <= idx) {
400 return mlir::emitError(*loc)
402 <<
") must be smaller than number of elements in tuple ("
403 << tupleTy.getFieldTypes().size() <<
")";
407 inferredReturnTypes.push_back(tupleTy.getFieldTypes()[idx]);
415LogicalResult FixedRegisterOp::inferReturnTypes(
416 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
417 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
418 SmallVectorImpl<Type> &inferredReturnTypes) {
419 inferredReturnTypes.push_back(
420 properties.as<Properties *>()->getReg().getType());
424OpFoldResult FixedRegisterOp::fold(FoldAdaptor adaptor) {
return getRegAttr(); }
430LogicalResult VirtualRegisterOp::verify() {
431 if (getAllowedRegs().
empty())
432 return emitOpError(
"must have at least one allowed register");
434 if (llvm::any_of(getAllowedRegs(), [](Attribute attr) {
435 return !isa<RegisterAttrInterface>(attr);
437 return emitOpError(
"all elements must be of RegisterAttrInterface");
439 if (!llvm::all_equal(
440 llvm::map_range(getAllowedRegs().getAsRange<RegisterAttrInterface>(),
441 [](
auto attr) {
return attr.getType(); })))
442 return emitOpError(
"all allowed registers must be of the same type");
447LogicalResult VirtualRegisterOp::inferReturnTypes(
448 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
449 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
450 SmallVectorImpl<Type> &inferredReturnTypes) {
451 auto allowedRegs = properties.as<Properties *>()->getAllowedRegs();
452 if (allowedRegs.empty()) {
454 return mlir::emitError(*loc,
"must have at least one allowed register");
459 auto regAttr = dyn_cast<RegisterAttrInterface>(allowedRegs[0]);
462 return mlir::emitError(
463 *loc,
"allowed register attributes must be of RegisterAttrInterface");
467 inferredReturnTypes.push_back(regAttr.getType());
475LogicalResult ContextSwitchOp::verify() {
476 auto elementTypes = getSequence().getType().getElementTypes();
477 if (elementTypes.size() != 3)
478 return emitOpError(
"sequence type must have exactly 3 element types");
480 if (getFrom().getType() != elementTypes[0])
482 "first sequence element type must match 'from' attribute type");
484 if (getTo().getType() != elementTypes[1])
486 "second sequence element type must match 'to' attribute type");
488 auto seqTy = dyn_cast<SequenceType>(elementTypes[2]);
489 if (!seqTy || !seqTy.getElementTypes().empty())
491 "third sequence element type must be a fully substituted sequence");
500LogicalResult TestOp::verifyRegions() {
501 if (!getTargetType().entryTypesMatch(getBody()->getArgumentTypes()))
502 return emitOpError(
"argument types must match dict entry types");
507LogicalResult TestOp::verify() {
508 if (getTemplateName().
empty())
509 return emitOpError(
"template name must not be empty");
514LogicalResult TestOp::verifySymbolUses(SymbolTableCollection &symbolTable) {
515 if (!getTargetAttr())
519 symbolTable.lookupNearestSymbolFrom<TargetOp>(*
this, getTargetAttr());
522 <<
"'" << *getTarget()
523 <<
"' does not reference a valid 'rtg.target' operation";
527 size_t targetIdx = 0;
528 auto targetEntries = target.getTarget().getEntries();
529 for (
auto testEntry : getTargetType().getEntries()) {
531 while (targetIdx < targetEntries.size() &&
532 targetEntries[targetIdx].name.getValue() < testEntry.name.getValue())
536 if (targetIdx >= targetEntries.size() ||
537 targetEntries[targetIdx].name != testEntry.name ||
538 targetEntries[targetIdx].type != testEntry.type) {
539 return emitOpError(
"referenced 'rtg.target' op's type is invalid: "
540 "missing entry called '")
541 << testEntry.name.getValue() <<
"' of type " << testEntry.type;
548ParseResult TestOp::parse(OpAsmParser &parser, OperationState &result) {
550 StringAttr symNameAttr;
551 if (parser.parseSymbolName(symNameAttr))
554 result.getOrAddProperties<TestOp::Properties>().sym_name = symNameAttr;
557 SmallVector<OpAsmParser::Argument> arguments;
558 SmallVector<StringAttr> names;
560 auto parseOneArgument = [&]() -> ParseResult {
562 if (parser.parseKeywordOrString(&name) || parser.parseEqual() ||
563 parser.parseArgument(arguments.emplace_back(),
true,
567 names.push_back(StringAttr::get(result.getContext(), name));
570 if (parser.parseCommaSeparatedList(OpAsmParser::Delimiter::Paren,
571 parseOneArgument,
" in argument list"))
574 SmallVector<Type> argTypes;
575 SmallVector<DictEntry> entries;
576 SmallVector<Location> argLocs;
577 argTypes.reserve(arguments.size());
578 argLocs.reserve(arguments.size());
579 for (
auto [name, arg] :
llvm::zip(names, arguments)) {
580 argTypes.push_back(arg.type);
581 argLocs.push_back(arg.sourceLoc ? *arg.sourceLoc : result.location);
582 entries.push_back({name, arg.type});
584 auto emitError = [&]() -> InFlightDiagnostic {
585 return parser.emitError(parser.getCurrentLocation());
587 Type type = DictType::getChecked(emitError, result.getContext(),
588 ArrayRef<DictEntry>(entries));
591 result.getOrAddProperties<TestOp::Properties>().targetType =
594 std::string templateName;
595 if (!parser.parseOptionalKeyword(
"template")) {
596 auto loc = parser.getCurrentLocation();
597 if (parser.parseString(&templateName))
600 if (templateName.empty())
601 return parser.emitError(loc,
"template name must not be empty");
604 StringAttr templateNameAttr = symNameAttr;
605 if (!templateName.empty())
606 templateNameAttr = StringAttr::get(result.getContext(), templateName);
608 StringAttr targetName;
609 if (!parser.parseOptionalKeyword(
"target"))
610 if (parser.parseSymbolName(targetName))
613 result.getOrAddProperties<TestOp::Properties>().templateName =
615 result.getOrAddProperties<TestOp::Properties>().target = targetName;
617 auto loc = parser.getCurrentLocation();
618 if (parser.parseOptionalAttrDictWithKeyword(result.attributes))
620 if (failed(verifyInherentAttrs(result.name, result.attributes, [&]() {
621 return parser.emitError(loc)
622 <<
"'" << result.name.getStringRef() <<
"' op ";
626 std::unique_ptr<Region> bodyRegionRegion = std::make_unique<Region>();
627 if (parser.parseRegion(*bodyRegionRegion, arguments))
630 if (bodyRegionRegion->empty()) {
631 bodyRegionRegion->emplaceBlock();
632 bodyRegionRegion->addArguments(argTypes, argLocs);
634 result.addRegion(std::move(bodyRegionRegion));
639void TestOp::print(OpAsmPrinter &p) {
641 p.printSymbolName(getSymNameAttr().getValue());
643 SmallString<32> resultNameStr;
644 llvm::interleaveComma(
645 llvm::zip(getTargetType().getEntries(), getBody()->getArguments()), p,
646 [&](
auto entryAndArg) {
647 auto [entry, arg] = entryAndArg;
648 p << entry.name.getValue() <<
" = ";
649 p.printRegionArgument(arg);
653 if (getSymNameAttr() != getTemplateNameAttr())
654 p <<
" template " << getTemplateNameAttr();
656 if (getTargetAttr()) {
658 p.printSymbolName(getTargetAttr().getValue());
661 p.printOptionalAttrDictWithKeyword(
662 (*this)->getAttrs(), {getSymNameAttrName(), getTargetTypeAttrName(),
663 getTargetAttrName(), getTemplateNameAttrName()});
665 p.printRegion(getBodyRegion(),
false);
668void TestOp::getAsmBlockArgumentNames(Region ®ion,
670 for (
auto [entry, arg] :
671 llvm::zip(getTargetType().getEntries(), region.getArguments()))
672 setNameFn(arg, entry.name.getValue());
679LogicalResult TargetOp::verifyRegions() {
680 if (!getTarget().entryTypesMatch(
681 getBody()->getTerminator()->getOperandTypes()))
682 return emitOpError(
"terminator operand types must match dict entry types");
691LogicalResult ValidateOp::verify() {
692 if (!getRef().getType().isValidContentType(getValue().getType()))
694 "result type must be a valid content type for the ref value");
703LogicalResult ArrayCreateOp::verify() {
704 if (!getElements().
empty() &&
705 getElements()[0].getType() != getType().getElementType())
706 return emitOpError(
"operand types must match array element type, expected ")
707 << getType().getElementType() <<
" but got "
708 << getElements()[0].getType();
713ParseResult ArrayCreateOp::parse(OpAsmParser &parser, OperationState &result) {
714 SmallVector<OpAsmParser::UnresolvedOperand> operands;
717 if (parser.parseOperandList(operands) || parser.parseColon() ||
719 parser.parseOptionalAttrDict(result.attributes))
722 if (failed(parser.resolveOperands(operands,
elementType, result.operands)))
730void ArrayCreateOp::print(OpAsmPrinter &p) {
732 p.printOperands(getElements());
733 p <<
" : " << getType().getElementType();
734 p.printOptionalAttrDict((*this)->getAttrs(), {});
741LogicalResult MemoryBlockDeclareOp::verify() {
744 "base address width must match memory block address width");
748 "end address width must match memory block address width");
750 if (getBaseAddress().ugt(getEndAddress()))
752 "base address must be smaller than or equal to the end address");
757ParseResult MemoryBlockDeclareOp::parse(OpAsmParser &parser,
758 OperationState &result) {
759 SmallVector<OpAsmParser::UnresolvedOperand> operands;
760 MemoryBlockType memoryBlockType;
763 if (parser.parseLSquare())
766 auto startLoc = parser.getCurrentLocation();
767 if (parser.parseInteger(start))
770 if (parser.parseMinus())
773 auto endLoc = parser.getCurrentLocation();
774 if (parser.parseInteger(end) || parser.parseRSquare() ||
775 parser.parseColonType(memoryBlockType) ||
776 parser.parseOptionalAttrDict(result.attributes))
779 auto width = memoryBlockType.getAddressWidth();
780 auto adjustAPInt = [&](APInt value, llvm::SMLoc loc) -> FailureOr<APInt> {
781 if (value.getBitWidth() > width) {
782 if (!value.isIntN(width))
783 return parser.emitError(
785 "address out of range for memory block with address width ")
788 return value.trunc(width);
791 if (value.getBitWidth() < width)
792 return value.zext(width);
797 auto startRes = adjustAPInt(start, startLoc);
798 auto endRes = adjustAPInt(end, endLoc);
799 if (failed(startRes) || failed(endRes))
802 auto intType = IntegerType::get(result.getContext(), width);
803 result.addAttribute(getBaseAddressAttrName(result.name),
804 IntegerAttr::get(intType, *startRes));
805 result.addAttribute(getEndAddressAttrName(result.name),
806 IntegerAttr::get(intType, *endRes));
808 result.addTypes(memoryBlockType);
812void MemoryBlockDeclareOp::print(OpAsmPrinter &p) {
813 SmallVector<char> str;
814 getBaseAddress().toString(str, 16,
false,
false,
false);
818 getEndAddress().toString(str, 16,
false,
false,
false);
819 p << str <<
"] : " << getType();
820 p.printOptionalAttrDict((*this)->getAttrs(),
821 {getBaseAddressAttrName(), getEndAddressAttrName()});
828LogicalResult MemoryBaseAddressOp::inferReturnTypes(
829 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
830 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
831 SmallVectorImpl<Type> &inferredReturnTypes) {
832 if (operands.empty())
834 auto memTy = dyn_cast<MemoryType>(operands[0].getType());
837 inferredReturnTypes.push_back(
838 ImmediateType::get(context, memTy.getAddressWidth()));
846LogicalResult ConcatImmediateOp::inferReturnTypes(
847 MLIRContext *context, std::optional<Location> loc, ValueRange operands,
848 DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
849 SmallVectorImpl<Type> &inferredReturnTypes) {
850 if (operands.empty()) {
852 return mlir::emitError(*loc) <<
"at least one operand must be provided";
856 unsigned totalWidth = 0;
857 for (
auto operand : operands) {
858 auto immType = dyn_cast<ImmediateType>(operand.getType());
861 return mlir::emitError(*loc)
862 <<
"all operands must be of immediate type";
865 totalWidth += immType.getWidth();
868 inferredReturnTypes.push_back(ImmediateType::get(context, totalWidth));
872OpFoldResult ConcatImmediateOp::fold(FoldAdaptor adaptor) {
874 if (getOperands().size() == 1)
875 return getOperands()[0];
878 if (llvm::all_of(adaptor.getOperands(), [](Attribute attr) {
879 return isa_and_nonnull<ImmediateAttr>(attr);
881 auto result = APInt::getZeroWidth();
882 for (
auto attr : adaptor.getOperands())
883 result = result.
concat(cast<ImmediateAttr>(attr).getValue());
885 return ImmediateAttr::get(getContext(), result);
895LogicalResult SliceImmediateOp::verify() {
896 auto srcWidth = getInput().getType().getWidth();
897 auto dstWidth = getResult().getType().getWidth();
899 if (getLowBit() >= srcWidth)
900 return emitOpError(
"from bit too large for input (got ")
901 << getLowBit() <<
", but input width is " << srcWidth <<
")";
903 if (srcWidth - getLowBit() < dstWidth)
904 return emitOpError(
"slice does not fit in input (trying to extract ")
905 << dstWidth <<
" bits starting at index " << getLowBit()
906 <<
", but only " << (srcWidth - getLowBit())
907 <<
" bits are available)";
912OpFoldResult SliceImmediateOp::fold(FoldAdaptor adaptor) {
913 if (
auto inputAttr = dyn_cast_or_null<ImmediateAttr>(adaptor.getInput())) {
914 auto resultWidth = getType().getWidth();
915 APInt sliced = inputAttr.getValue().extractBits(resultWidth, getLowBit());
916 return ImmediateAttr::get(getContext(), sliced);
926#define GET_OP_CLASSES
927#include "circt/Dialect/RTG/IR/RTG.cpp.inc"
assert(baseType &&"element must be base type")
static SmallVector< T > concat(const SmallVectorImpl< T > &a, const SmallVectorImpl< T > &b)
Returns a new vector containing the concatenation of vectors a and b.
static size_t getAddressWidth(size_t depth)
static InstancePath empty
Direction get(bool isOutput)
Returns an output direction if isOutput is true, otherwise returns an input direction.
int64_t getBitWidth(mlir::Type type)
Return the hardware bit width of a type.
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
function_ref< void(Value, StringRef)> OpAsmSetValueNameFn