CIRCT  20.0.0git
circt::pipelinetocalyx::ComponentLoweringState Member List

This is the complete list of members for circt::pipelinetocalyx::ComponentLoweringState, including all inherited members.

addBlockArgGroup(Block *from, Block *to, calyx::GroupOp grp)circt::calyx::ComponentLoweringStateInterface
addBlockArgReg(Block *block, calyx::RegisterOp reg, unsigned idx)circt::calyx::ComponentLoweringStateInterface
addBlockScheduleable(mlir::Block *block, const Scheduleable &scheduleable)circt::calyx::SchedulerInterface< Scheduleable >inline
addInstance(StringRef calleeName, InstanceOp instanceOp)circt::calyx::ComponentLoweringStateInterface
addLoopIterReg(PipelineWhileOp op, calyx::RegisterOp reg, unsigned idx)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
addPipelineEpilogue(Operation *op, SmallVector< StringAttr > groupNames)circt::pipelinetocalyx::PipelineSchedulerinline
addPipelinePrologue(Operation *op, SmallVector< StringAttr > groupNames)circt::pipelinetocalyx::PipelineSchedulerinline
addPipelineReg(Operation *stage, calyx::RegisterOp reg, unsigned idx)circt::pipelinetocalyx::PipelineSchedulerinline
addReturnReg(calyx::RegisterOp reg, unsigned idx)circt::calyx::ComponentLoweringStateInterface
blockArgGroupscirct::calyx::ComponentLoweringStateInterfaceprivate
blockArgRegscirct::calyx::ComponentLoweringStateInterfaceprivate
blockScheduleablescirct::calyx::SchedulerInterface< Scheduleable >private
buildLoopIterArgAssignments(OpBuilder &builder, PipelineWhileOp op, calyx::ComponentOp componentOp, Twine uniqueSuffix, MutableArrayRef< OpOperand > ops)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
componentcirct::calyx::ComponentLoweringStateInterfaceprivate
ComponentLoweringState(calyx::ComponentOp component)circt::pipelinetocalyx::ComponentLoweringStateinline
ComponentLoweringStateInterface(calyx::ComponentOp component)circt::calyx::ComponentLoweringStateInterface
createPipelineEpilogue(Operation *op, PatternRewriter &rewriter)circt::pipelinetocalyx::PipelineSchedulerinline
createPipelinePrologue(Operation *op, PatternRewriter &rewriter)circt::pipelinetocalyx::PipelineSchedulerinline
extMemDatacirct::calyx::ComponentLoweringStateInterfaceprivate
funcOpResultMappingcirct::calyx::ComponentLoweringStateInterfaceprivate
getBlockArgGroups(Block *from, Block *to)circt::calyx::ComponentLoweringStateInterface
getBlockArgRegs(Block *block)circt::calyx::ComponentLoweringStateInterface
getBlockScheduleables(mlir::Block *block)circt::calyx::SchedulerInterface< Scheduleable >inline
getComponentOp()circt::calyx::ComponentLoweringStateInterface
getEvaluatingGroup(Value v)circt::calyx::ComponentLoweringStateInterfaceinline
getExtMemData()circt::calyx::ComponentLoweringStateInterfaceinline
getExtMemData() constcirct::calyx::ComponentLoweringStateInterfaceinline
getFuncOpResultMapping(unsigned funcReturnIdx)circt::calyx::ComponentLoweringStateInterface
getInstance(StringRef calleeName)circt::calyx::ComponentLoweringStateInterface
getLoopInitGroups(PipelineWhileOp op)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
getLoopIterReg(PipelineWhileOp op, unsigned idx)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
getLoopIterRegs(PipelineWhileOp op)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
getLoopLatchGroup(PipelineWhileOp op)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
getMemoryInterface(Value memref)circt::calyx::ComponentLoweringStateInterface
getNewLibraryOpInstance(OpBuilder &builder, Location loc, TypeRange resTypes)circt::calyx::ComponentLoweringStateInterfaceinline
getNonPipelinedGroupFrom(Operation *op)circt::pipelinetocalyx::PipelineSchedulerinline
getPipelinePrologue(Operation *op)circt::pipelinetocalyx::PipelineSchedulerinline
getPipelineRegs(Operation *stage)circt::pipelinetocalyx::PipelineSchedulerinline
getReturnReg(unsigned idx)circt::calyx::ComponentLoweringStateInterface
getUniqueName(StringRef prefix)circt::calyx::ComponentLoweringStateInterface
getUniqueName(Operation *op)circt::calyx::ComponentLoweringStateInterface
instanceMapcirct::calyx::ComponentLoweringStateInterfaceprivate
isInputPortOfMemory(Value v)circt::calyx::ComponentLoweringStateInterface
loopInitGroupscirct::calyx::LoopLoweringStateInterface< PipelineWhileOp >private
loopIterRegscirct::calyx::LoopLoweringStateInterface< PipelineWhileOp >private
loopLatchGroupscirct::calyx::LoopLoweringStateInterface< PipelineWhileOp >private
memoriescirct::calyx::ComponentLoweringStateInterfaceprivate
operationToGroupcirct::pipelinetocalyx::PipelineSchedulerprivate
opNamescirct::calyx::ComponentLoweringStateInterfaceprivate
pipelineEpiloguecirct::pipelinetocalyx::PipelineSchedulerprivate
pipelineProloguecirct::pipelinetocalyx::PipelineSchedulerprivate
pipelineRegscirct::pipelinetocalyx::PipelineSchedulerprivate
prefixIdMapcirct::calyx::ComponentLoweringStateInterfaceprivate
registerEvaluatingGroup(Value v, calyx::GroupInterface group)circt::calyx::ComponentLoweringStateInterface
registerMemoryInterface(Value memref, const calyx::MemoryInterface &memoryInterface)circt::calyx::ComponentLoweringStateInterface
registerNonPipelineOperations(Operation *op, calyx::GroupInterface group)circt::pipelinetocalyx::PipelineSchedulerinline
returnRegscirct::calyx::ComponentLoweringStateInterfaceprivate
setDataField(StringRef name, llvm::json::Array data)circt::calyx::ComponentLoweringStateInterfaceinline
setFormat(StringRef name, std::string numType, bool isSigned, unsigned width)circt::calyx::ComponentLoweringStateInterfaceinline
setFuncOpResultMapping(const DenseMap< unsigned, unsigned > &mapping)circt::calyx::ComponentLoweringStateInterface
setLoopInitGroups(PipelineWhileOp op, SmallVector< calyx::GroupOp > groups)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
setLoopLatchGroup(PipelineWhileOp op, calyx::GroupOp group)circt::calyx::LoopLoweringStateInterface< PipelineWhileOp >inline
setUniqueName(Operation *op, StringRef prefix)circt::calyx::ComponentLoweringStateInterface
valueGroupAssignscirct::calyx::ComponentLoweringStateInterfaceprivate
~ComponentLoweringStateInterface()circt::calyx::ComponentLoweringStateInterface
~LoopLoweringStateInterface()=defaultcirct::calyx::LoopLoweringStateInterface< PipelineWhileOp >