9#include "slang/ast/expressions/AssertionExpr.h"
16#include "mlir/IR/BuiltinAttributes.h"
17#include "mlir/Support/LLVM.h"
18#include "slang/analysis/AnalysisManager.h"
19#include "slang/analysis/AnalyzedAssertion.h"
20#include "slang/ast/ASTVisitor.h"
21#include "slang/ast/SystemSubroutine.h"
22#include "slang/parsing/KnownSystemName.h"
28using namespace ImportVerilog;
32struct AssertionExprVisitor {
37 AssertionExprVisitor(
Context &context, Location loc)
38 : context(context), loc(loc), builder(context.builder) {}
41 std::pair<mlir::IntegerAttr, mlir::IntegerAttr>
42 convertRangeToAttrs(uint32_t min,
43 std::optional<uint32_t> max = std::nullopt) {
44 auto minAttr = builder.getI64IntegerAttr(min);
45 mlir::IntegerAttr rangeAttr;
46 if (max.has_value()) {
47 rangeAttr = builder.getI64IntegerAttr(max.value() - min);
49 return {minAttr, rangeAttr};
53 Value createRepetition(Location loc,
54 const slang::ast::SequenceRepetition &repetition,
55 Value &inputSequence) {
57 auto [minRepetitions, repetitionRange] =
58 convertRangeToAttrs(repetition.range.min, repetition.range.max);
60 using slang::ast::SequenceRepetition;
63 if ((repetition.kind == SequenceRepetition::Nonconsecutive ||
64 repetition.kind == SequenceRepetition::GoTo) &&
67 repetition.kind == SequenceRepetition::Nonconsecutive
68 ?
"Nonconsecutive repetition requires a maximum value"
69 :
"GoTo repetition requires a maximum value");
73 switch (repetition.kind) {
74 case SequenceRepetition::Consecutive:
75 return ltl::RepeatOp::create(builder, loc, inputSequence, minRepetitions,
77 case SequenceRepetition::Nonconsecutive:
78 return ltl::NonConsecutiveRepeatOp::create(
79 builder, loc, inputSequence, minRepetitions, repetitionRange);
80 case SequenceRepetition::GoTo:
81 return ltl::GoToRepeatOp::create(builder, loc, inputSequence,
82 minRepetitions, repetitionRange);
84 llvm_unreachable(
"All enum values handled in switch");
87 Value visit(
const slang::ast::SimpleAssertionExpr &expr) {
93 auto valueType = value.getType();
96 if (!mlir::isa<ltl::SequenceType, ltl::PropertyType, mlir::IntegerType>(
105 if (!expr.repetition.has_value()) {
111 return createRepetition(loc, expr.repetition.value(), value);
114 Value visit(
const slang::ast::SequenceConcatExpr &expr) {
116 assert(!expr.elements.empty());
118 SmallVector<Value> sequenceElements;
120 for (
const auto &concatElement : expr.elements) {
121 Value sequenceValue =
126 [[maybe_unused]] Type valueType = sequenceValue.getType();
127 assert(valueType.isInteger(1) || mlir::isa<ltl::SequenceType>(valueType));
129 auto [delayMin, delayRange] =
130 convertRangeToAttrs(concatElement.delay.min, concatElement.delay.max);
131 auto delayedSequence = ltl::DelayOp::create(builder, loc, sequenceValue,
132 delayMin, delayRange);
133 sequenceElements.push_back(delayedSequence);
136 return builder.createOrFold<ltl::ConcatOp>(loc, sequenceElements);
139 Value visit(
const slang::ast::UnaryAssertionExpr &expr) {
143 using slang::ast::UnaryAssertionOperator;
145 case UnaryAssertionOperator::Not:
146 return ltl::NotOp::create(builder, loc, value);
147 case UnaryAssertionOperator::SEventually:
148 if (expr.range.has_value()) {
149 mlir::emitError(loc,
"Strong eventually with range not supported");
152 return ltl::EventuallyOp::create(builder, loc, value);
154 case UnaryAssertionOperator::Always: {
155 std::pair<mlir::IntegerAttr, mlir::IntegerAttr> attr = {
156 builder.getI64IntegerAttr(0), mlir::IntegerAttr{}};
157 if (expr.range.has_value()) {
159 convertRangeToAttrs(expr.range.value().min, expr.range.value().max);
161 return ltl::RepeatOp::create(builder, loc, value, attr.first,
164 case UnaryAssertionOperator::NextTime: {
165 auto minRepetitions = builder.getI64IntegerAttr(1);
166 if (expr.range.has_value()) {
167 minRepetitions = builder.getI64IntegerAttr(expr.range.value().min);
169 return ltl::DelayOp::create(builder, loc, value, minRepetitions,
170 builder.getI64IntegerAttr(0));
172 case UnaryAssertionOperator::Eventually:
173 case UnaryAssertionOperator::SNextTime:
174 case UnaryAssertionOperator::SAlways:
175 mlir::emitError(loc,
"unsupported unary operator: ")
176 << slang::ast::toString(expr.op);
179 llvm_unreachable(
"All enum values handled in switch");
182 Value visit(
const slang::ast::BinaryAssertionExpr &expr) {
187 SmallVector<Value, 2> operands = {lhs, rhs};
188 using slang::ast::BinaryAssertionOperator;
190 case BinaryAssertionOperator::And:
191 return ltl::AndOp::create(builder, loc, operands);
192 case BinaryAssertionOperator::Or:
193 return ltl::OrOp::create(builder, loc, operands);
194 case BinaryAssertionOperator::Intersect:
195 return ltl::IntersectOp::create(builder, loc, operands);
196 case BinaryAssertionOperator::Throughout: {
197 auto lhsRepeat = ltl::RepeatOp::create(
198 builder, loc, lhs, builder.getI64IntegerAttr(0), mlir::IntegerAttr{});
199 return ltl::IntersectOp::create(builder, loc,
200 SmallVector<Value, 2>{lhsRepeat, rhs});
202 case BinaryAssertionOperator::Within: {
205 auto oneRepeat = ltl::RepeatOp::create(builder, loc, constOne,
206 builder.getI64IntegerAttr(0),
207 mlir::IntegerAttr{});
208 auto repeatDelay = ltl::DelayOp::create(builder, loc, oneRepeat,
209 builder.getI64IntegerAttr(1),
210 builder.getI64IntegerAttr(0));
212 ltl::DelayOp::create(builder, loc, lhs, builder.getI64IntegerAttr(1),
213 builder.getI64IntegerAttr(0));
214 auto combined = ltl::ConcatOp::create(
215 builder, loc, SmallVector<Value, 3>{repeatDelay, lhsDelay, constOne});
216 return ltl::IntersectOp::create(builder, loc,
217 SmallVector<Value, 2>{combined, rhs});
219 case BinaryAssertionOperator::Iff: {
220 auto ored = ltl::OrOp::create(builder, loc, operands);
221 auto notOred = ltl::NotOp::create(builder, loc, ored);
222 auto anded = ltl::AndOp::create(builder, loc, operands);
223 return ltl::OrOp::create(builder, loc,
224 SmallVector<Value, 2>{notOred, anded});
226 case BinaryAssertionOperator::Until:
227 return ltl::UntilOp::create(builder, loc, operands);
228 case BinaryAssertionOperator::UntilWith: {
229 auto untilOp = ltl::UntilOp::create(builder, loc, operands);
230 auto andOp = ltl::AndOp::create(builder, loc, operands);
231 auto notUntil = ltl::NotOp::create(builder, loc, untilOp);
232 return ltl::OrOp::create(builder, loc,
233 SmallVector<Value, 2>{notUntil, andOp});
235 case BinaryAssertionOperator::Implies: {
236 auto notLhs = ltl::NotOp::create(builder, loc, lhs);
237 return ltl::OrOp::create(builder, loc,
238 SmallVector<Value, 2>{notLhs, rhs});
240 case BinaryAssertionOperator::OverlappedImplication:
241 return ltl::ImplicationOp::create(builder, loc, operands);
242 case BinaryAssertionOperator::NonOverlappedImplication: {
246 ltl::DelayOp::create(builder, loc, lhs, builder.getI64IntegerAttr(1),
247 builder.getI64IntegerAttr(0));
248 auto antecedent = ltl::ConcatOp::create(
249 builder, loc, SmallVector<Value, 2>{lhsDelay, constOne});
250 return ltl::ImplicationOp::create(builder, loc,
251 SmallVector<Value, 2>{antecedent, rhs});
253 case BinaryAssertionOperator::OverlappedFollowedBy: {
254 auto notRhs = ltl::NotOp::create(builder, loc, rhs);
255 auto implication = ltl::ImplicationOp::create(
256 builder, loc, SmallVector<Value, 2>{lhs, notRhs});
257 return ltl::NotOp::create(builder, loc, implication);
259 case BinaryAssertionOperator::NonOverlappedFollowedBy: {
262 auto notRhs = ltl::NotOp::create(builder, loc, rhs);
264 ltl::DelayOp::create(builder, loc, lhs, builder.getI64IntegerAttr(1),
265 builder.getI64IntegerAttr(0));
266 auto antecedent = ltl::ConcatOp::create(
267 builder, loc, SmallVector<Value, 2>{lhsDelay, constOne});
268 auto implication = ltl::ImplicationOp::create(
269 builder, loc, SmallVector<Value, 2>{antecedent, notRhs});
270 return ltl::NotOp::create(builder, loc, implication);
272 case BinaryAssertionOperator::SUntil:
273 case BinaryAssertionOperator::SUntilWith:
274 mlir::emitError(loc,
"unsupported binary operator: ")
275 << slang::ast::toString(expr.op);
278 llvm_unreachable(
"All enum values handled in switch");
281 Value visit(
const slang::ast::ClockingAssertionExpr &expr) {
289 template <
typename T>
290 Value visit(T &&node) {
291 mlir::emitError(loc,
"unsupported expression: ")
292 << slang::ast::toString(node.kind);
296 Value visitInvalid(
const slang::ast::AssertionExpr &expr) {
297 mlir::emitError(loc,
"invalid expression");
303FailureOr<Value> Context::convertAssertionSystemCallArity1(
304 const slang::ast::SystemSubroutine &subroutine, Location loc, Value value,
305 Type originalType, Value clockVal) {
306 using ksn = slang::parsing::KnownSystemName;
307 auto nameId = subroutine.knownNameId;
310 auto castToMoore = [&](Value v) -> Value {
311 if (
auto ty = dyn_cast<moore::IntType>(originalType)) {
312 v = moore::FromBuiltinIntOp::create(
builder, loc, v);
313 if (ty.getDomain() == Domain::FourValued)
314 v = moore::IntToLogicOp::create(
builder, loc, v);
320 auto castToTwoValued = [&](Value v) -> Value {
321 return moore::FromBuiltinIntOp::create(
builder, loc, v);
326 return castToMoore(ltl::SampledOp::create(
builder, loc, value));
331 ltl::PastOp::create(
builder, loc, value, 1, clockVal).getResult();
332 return castToTwoValued(comb::ICmpOp::create(
333 builder, loc, comb::ICmpPredicate::ugt, past, value,
false));
339 ltl::PastOp::create(
builder, loc, value, 1, clockVal).getResult();
340 return castToTwoValued(comb::ICmpOp::create(
341 builder, loc, comb::ICmpPredicate::ult, past, value,
false));
347 ltl::PastOp::create(
builder, loc, value, 1, clockVal).getResult();
348 return castToTwoValued(comb::ICmpOp::create(
349 builder, loc, comb::ICmpPredicate::ne, past, value,
false));
355 ltl::PastOp::create(
builder, loc, value, 1, clockVal).getResult();
356 return castToTwoValued(comb::ICmpOp::create(
357 builder, loc, comb::ICmpPredicate::eq, past, value,
false));
361 return castToMoore(ltl::PastOp::create(
builder, loc, value, 1, clockVal));
369 const slang::ast::CallExpression &expr,
370 const slang::ast::CallExpression::SystemCallInfo &info, Location loc) {
372 const slang::ast::TimingControl *clock =
nullptr;
375 clock = clockIt->second;
379 const slang::ast::SignalEventControl *signal =
nullptr;
380 if (clock->kind == slang::ast::TimingControlKind::SignalEvent) {
381 signal = &clock->as<slang::ast::SignalEventControl>();
382 }
else if (clock->kind == slang::ast::TimingControlKind::EventList) {
383 mlir::emitError(loc,
"sampled value functions with multiple event "
384 "triggers are not supported");
387 llvm_unreachable(
"unexpected clock kind for assertion");
390 if (signal->edge != slang::ast::EdgeKind::PosEdge) {
393 "sampled value functions are only supported with posedge clocks");
403 const auto &subroutine = *info.subroutine;
404 auto args = expr.arguments();
406 FailureOr<Value> result;
410 moore::IntType valTy;
412 switch (args.size()) {
415 originalType = value.getType();
416 valTy = dyn_cast<moore::IntType>(value.getType());
418 mlir::emitError(loc) <<
"expected integer argument for `"
419 << subroutine.name <<
"`";
425 if (valTy.getDomain() == Domain::FourValued) {
426 value =
builder.createOrFold<moore::LogicToIntOp>(loc, value);
428 intVal =
builder.createOrFold<moore::ToBuiltinIntOp>(loc, value);
432 originalType, clockVal);
447 mlir::emitError(loc) <<
"unsupported system call `" << subroutine.name <<
"`";
453 AssertionExprVisitor visitor{*
this, loc};
454 return expr.visit(visitor);
462 auto loc = value.getLoc();
463 auto type = dyn_cast<moore::IntType>(value.getType());
464 if (!type || type.getBitSize() != 1) {
465 mlir::emitError(loc,
"expected a 1-bit integer");
468 if (type.getDomain() == Domain::FourValued) {
469 value = moore::LogicToIntOp::create(
builder, loc, value);
471 return moore::ToBuiltinIntOp::create(
builder, loc, value);
475struct AssertionClockVisitor
476 : slang::ast::ASTVisitor<AssertionClockVisitor, true, true> {
478 const slang::analysis::AnalyzedAssertion &assertion;
479 const slang::ast::TimingControl *currentClock =
nullptr;
482 const slang::analysis::AnalyzedAssertion &assertion)
485 void handle(
const slang::ast::CallExpression &node) {
487 context.assertionCallClocks[&node] = currentClock;
491 template <
typename T>
492 std::enable_if_t<std::is_base_of_v<slang::ast::AssertionExpr, T>>
493 handle(
const T &node) {
494 auto *prevClock = currentClock;
495 if (
auto *clk = assertion.getClock(node))
498 currentClock = prevClock;
505 slang::analysis::AnalysisManager am;
506 am.addListener([
this](
const slang::analysis::AnalyzedAssertion &assertion) {
507 AssertionClockVisitor visitor{*
this, assertion};
508 assertion.getRoot().visit(visitor);
assert(baseType &&"element must be base type")
static std::unique_ptr< Context > context
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
A helper class to facilitate the conversion from a Slang AST to MLIR operations.
Value convertToI1(Value value)
Helper function to convert a value to a MLIR I1 value.
Value convertLTLTimingControl(const slang::ast::TimingControl &ctrl, const Value &seqOrPro)
slang::ast::Compilation & compilation
OpBuilder builder
The builder used to create IR operations.
Value convertAssertionCallExpression(const slang::ast::CallExpression &expr, const slang::ast::CallExpression::SystemCallInfo &info, Location loc)
FailureOr< Value > convertAssertionSystemCallArity1(const slang::ast::SystemSubroutine &subroutine, Location loc, Value value, Type originalType, Value clockVal)
Convert system function calls within properties and assertion with a single argument.
Type convertType(const slang::ast::Type &type, LocationAttr loc={})
Convert a slang type into an MLIR type.
Value convertRvalueExpression(const slang::ast::Expression &expr, Type requiredType={})
Value materializeConversion(Type type, Value value, bool isSigned, Location loc, bool fallible=false)
Helper function to insert the necessary operations to cast a value from one type to another.
void populateAssertionClocks()
Generates a map from assertions to clocks using Slang's analysis.
DenseMap< const slang::ast::CallExpression *, const slang::ast::TimingControl * > assertionCallClocks
Maps assertion system calls to their corresponding clocks.
Value convertAssertionExpression(const slang::ast::AssertionExpr &expr, Location loc)
Location convertLocation(slang::SourceLocation loc)
Convert a slang SourceLocation into an MLIR Location.