13#ifndef CIRCT_DIALECT_FIRRTL_PASSES_H
14#define CIRCT_DIALECT_FIRRTL_PASSES_H
17#include "mlir/Pass/Pass.h"
18#include "mlir/Pass/PassRegistry.h"
19#include "llvm/ADT/ArrayRef.h"
32namespace PreserveAggregate {
50namespace PreserveValues {
90 unsigned &numConverted);
92 InstanceInfo &instanceInfo,
93 bool convertAsyncDomainMems =
false);
96#include "circt/Dialect/FIRRTL/Passes.h.inc"
99#define GEN_PASS_REGISTRATION
100#include "circt/Dialect/FIRRTL/Passes.h.inc"
HW-specific instance graph with a virtual entry node linking to all publicly visible modules.
@ All
Preserve all aggregate values.
@ OneDimVec
Preserve only 1d vectors of ground type (e.g. UInt<2>[3]).
@ Vec
Preserve only vectors (e.g. UInt<2>[3][3]).
@ None
Don't preserve aggregate at all.
@ None
Don't explicitly preserve any named values.
@ Strip
Strip all names. No name on declaration is preserved.
InferDomainsMode
The mode for the InferDomains pass.
@ Strip
Erase domains from the input circuit.
@ Check
Check domains without inference.
@ Infer
Check domains with inference for private modules.
@ InferAll
Check domains with inference for both public and private modules.
void runCombMemsToRegOfVec(FModuleOp mod, bool ignoreReadEnable, unsigned &numConverted)
LogicalResult runFullReset(CircuitOp circuit, InstanceGraph &ig, InstanceInfo &instanceInfo, bool convertAsyncDomainMems=false)
std::map< std::string, std::set< std::string > > InstanceGraph
Iterates over the handshake::FuncOp's in the program to build an instance graph.
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.