28#include "mlir/Transforms/Passes.h"
36 pm.addPass(arc::createResolveXMRRef());
37 pm.addPass(om::createStripOMPass());
38 pm.addPass(emit::createStripEmitPass());
40 pm.addPass(createLowerVerifSimulationsPass());
42 arc::AddTapsOptions opts;
46 pm.addPass(arc::createAddTaps(opts));
50 arc::InferMemoriesOptions opts;
53 pm.addPass(arc::createInferMemories(opts));
55 pm.addPass(sim::createLowerDPIFunc());
56 pm.addPass(createCSEPass());
57 pm.addPass(arc::createArcCanonicalizer());
63 sim::SquashSimTriggeredOptions opts;
64 opts.convertToHW =
true;
65 pm.addNestedPass<
hw::HWModuleOp>(sim::createSquashSimTriggered(opts));
67 pm.addPass(arc::createLowerProcessesPass());
69 ConvertToArcsPassOptions opts;
71 pm.addPass(createConvertToArcsPass(opts));
74 pm.addPass(arc::createDedup());
75 pm.addPass(hw::createFlattenModules());
76 pm.addPass(createCSEPass());
77 pm.addPass(arc::createArcCanonicalizer());
84 pm.addPass(arc::createSplitLoops());
86 pm.addPass(arc::createDedup());
88 arc::InferStatePropertiesOptions opts;
91 pm.addPass(arc::createInferStateProperties(opts));
93 pm.addPass(createCSEPass());
94 pm.addPass(arc::createArcCanonicalizer());
97 pm.addPass(arc::createMakeTables());
98 pm.addPass(createCSEPass());
99 pm.addPass(arc::createArcCanonicalizer());
116 pm.addPass(arc::createLowerStatePass());
125 pm.addPass(arc::createInlineArcs());
127 pm.addPass(arc::createMergeIfsPass());
128 pm.addPass(createCSEPass());
129 pm.addPass(arc::createArcCanonicalizer());
130 pm.addPass(arc::createLowerCoroutinesPass());
135 pm.addPass(arc::createLowerArcsToFuncs());
136 pm.addPass(arc::createRemoveI0Types());
138 AllocateStateOptions allocStateOpts;
140 pm.nest<arc::ModelOp>().addPass(arc::createAllocateState(allocStateOpts));
142 pm.nest<arc::ModelOp>().addPass(arc::createAllocateState());
143 pm.addPass(arc::createLowerClocksToFuncs());
148 pm.addPass(createCSEPass());
149 pm.addPass(arc::createArcCanonicalizer());
155 pm.addPass(createGenerateDriver());
157 hw::HWConvertBitcastsOptions options;
158 options.allowPartialConversion =
false;
159 pm.addPass(hw::createHWConvertBitcasts(options));
161 if (!options.noRuntime) {
162 InsertRuntimeOptions opts;
164 opts.traceFileName = options.traceFileName;
165 pm.addPass(createInsertRuntime(opts));
167 if (options.bufferizeArrays) {
168 pm.addPass(createLowerArrays());
171 pm.addPass(createCSEPass());
172 pm.addPass(arc::createArcCanonicalizer());
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
void populateArcStateLoweringPipeline(mlir::OpPassManager &pm, const ArcStateLoweringOptions &options={})
void populateArcToLLVMPipeline(mlir::OpPassManager &pm, const ArcToLLVMOptions &options={})
void populateArcOptimizationPipeline(mlir::OpPassManager &pm, const ArcOptimizationOptions &options={})
void populateArcConversionPipeline(mlir::OpPassManager &pm, const ArcConversionOptions &options={})
std::unique_ptr< mlir::Pass > createLowerFirMemPass()
std::unique_ptr< OperationPass< ModuleOp > > createLowerArcToLLVMPass()
void populateArcPreprocessingPipeline(mlir::OpPassManager &pm, const ArcPreprocessingOptions &options={})
void populateArcStateAllocationPipeline(mlir::OpPassManager &pm, const ArcStateAllocationOptions &options={})
Option< bool > observeRegisters
Option< bool > shouldDedup
Option< bool > shouldMakeLUTs
Option< bool > shouldDetectResets
Option< bool > shouldDetectEnables
Option< bool > shouldDedup
Option< bool > observeNamedValues
Option< bool > observeMemories
Option< bool > asyncResetsAsSync
Option< bool > observeWires
Option< bool > observePorts
Option< bool > insertTraceTaps
Option< unsigned > splitFuncsThreshold
Option< bool > shouldInline
Option< bool > noGenerateDriver
Option< std::string > extraRuntimeArgs