(baseClock, enable) port pair to append to a module. More...

Collaboration diagram for circt::firrtl::GatedClockConversion::PortPairPlan:

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Public Attributes
FModuleOp	mod

unsigned	gatedClkIndex
	Clock port this pair shadows (naming only).

Direction	dir

unsigned	baseIdx
	Final port indices, pre-assigned at planning time.

unsigned	enIdx

MatRef	outBaseClk = MatRef()
	`dir == Out` only: values inside `mod` driving the new output ports.

unsigned	outEnableId = kNoEnable

Detailed Description

(baseClock, enable) port pair to append to a module.

Definition at line 167 of file GatedClockConversion.h.

Member Data Documentation

unsigned circt::firrtl::GatedClockConversion::PortPairPlan::baseIdx

Final port indices, pre-assigned at planning time.

Definition at line 173 of file GatedClockConversion.h.

Direction circt::firrtl::GatedClockConversion::PortPairPlan::dir

Definition at line 171 of file GatedClockConversion.h.

unsigned circt::firrtl::GatedClockConversion::PortPairPlan::enIdx

Definition at line 173 of file GatedClockConversion.h.

unsigned circt::firrtl::GatedClockConversion::PortPairPlan::gatedClkIndex

Clock port this pair shadows (naming only).

Definition at line 170 of file GatedClockConversion.h.

FModuleOp circt::firrtl::GatedClockConversion::PortPairPlan::mod

Definition at line 168 of file GatedClockConversion.h.

MatRef circt::firrtl::GatedClockConversion::PortPairPlan::outBaseClk = MatRef()

dir == Out only: values inside mod driving the new output ports.

Definition at line 175 of file GatedClockConversion.h.

unsigned circt::firrtl::GatedClockConversion::PortPairPlan::outEnableId = kNoEnable

Definition at line 176 of file GatedClockConversion.h.

The documentation for this struct was generated from the following file:

/home/runner/work/circt-www/circt-www/circt_src/include/circt/Dialect/FIRRTL/GatedClockConversion.h