CIRCT 22.0.0git
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SynthOps.h
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1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the operations of the Synth dialect.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef CIRCT_DIALECT_SYNTH_SYNTHOPS_H
14#define CIRCT_DIALECT_SYNTH_SYNTHOPS_H
15
17#include "circt/Support/LLVM.h"
18#include "mlir/IR/Attributes.h"
19#include "mlir/IR/Builders.h"
20#include "mlir/IR/BuiltinOps.h"
21#include "mlir/IR/BuiltinTypes.h"
22#include "mlir/IR/Dialect.h"
23#include "mlir/IR/Operation.h"
24#include "mlir/Interfaces/InferTypeOpInterface.h"
25#include "mlir/Interfaces/SideEffectInterfaces.h"
26#include "mlir/Rewrite/PatternApplicator.h"
27
28#define GET_OP_CLASSES
29#include "circt/Dialect/Synth/Synth.h.inc"
30
31#include "llvm/ADT/PriorityQueue.h"
32
33namespace circt {
34namespace synth {
36 : mlir::OpRewritePattern<aig::AndInverterOp> {
37 using OpRewritePattern<aig::AndInverterOp>::OpRewritePattern;
38 mlir::LogicalResult
39 matchAndRewrite(aig::AndInverterOp op,
40 mlir::PatternRewriter &rewriter) const override;
41};
42
43/// This function performs a topological sort on the operations within each
44/// block of graph regions in the given operation. It uses MLIR's topological
45/// sort utility as a wrapper, ensuring that operations are ordered such that
46/// all operands are defined before their uses. The `isOperandReady` callback
47/// allows customization of when an operand is considered ready for sorting.
49 mlir::Operation *op,
50 llvm::function_ref<bool(mlir::Value, mlir::Operation *)> isOperandReady);
51
52//===----------------------------------------------------------------------===//
53// Delay-Aware Tree Building Utilities
54//===----------------------------------------------------------------------===//
55
56/// Helper class for delay-aware tree building.
57/// Stores a value along with its arrival time and inversion flag.
59 /// The value and an optional inversion flag packed together.
60 /// The inversion flag is used for AndInverterOp lowering.
61 llvm::PointerIntPair<mlir::Value, 1, bool> value;
62
63 /// The arrival time (delay) of this value in the circuit.
64 int64_t arrivalTime;
65
66 /// Value numbering for deterministic ordering when arrival times are equal.
67 /// This ensures consistent results across runs when multiple values have
68 /// the same delay.
69 size_t valueNumbering = 0;
70
71public:
72 ValueWithArrivalTime(mlir::Value value, int64_t arrivalTime, bool invert,
73 size_t valueNumbering = 0)
76
77 mlir::Value getValue() const { return value.getPointer(); }
78 bool isInverted() const { return value.getInt(); }
79 int64_t getArrivalTime() const { return arrivalTime; }
80
82 value.setInt(!value.getInt());
83 return *this;
84 }
85
86 /// Comparison operator for priority queue. Values with earlier arrival times
87 /// have higher priority. When arrival times are equal, use value numbering
88 /// for determinism.
89 bool operator>(const ValueWithArrivalTime &other) const {
90 return std::tie(arrivalTime, valueNumbering) >
91 std::tie(other.arrivalTime, other.valueNumbering);
92 }
93};
94
95/// Build a balanced binary tree using a priority queue to greedily pair
96/// elements with earliest arrival times. This minimizes the critical path
97/// delay.
98///
99/// Template parameters:
100/// T - The element type (must have operator> defined)
101///
102/// The algorithm uses a min-heap to repeatedly combine the two elements with
103/// the earliest arrival times, which is optimal for minimizing maximum delay.
104template <typename T>
105T buildBalancedTreeWithArrivalTimes(llvm::ArrayRef<T> elements,
106 llvm::function_ref<T(T, T)> combine) {
107 assert(!elements.empty() && "Cannot build tree from empty elements");
108
109 if (elements.size() == 1)
110 return elements[0];
111 if (elements.size() == 2)
112 return combine(elements[0], elements[1]);
113
114 // Min-heap priority queue ordered by operator>
115 llvm::PriorityQueue<T, std::vector<T>, std::greater<T>> pq(elements.begin(),
116 elements.end());
117
118 // Greedily pair the two earliest-arriving elements
119 while (pq.size() > 1) {
120 T e1 = pq.top();
121 pq.pop();
122 T e2 = pq.top();
123 pq.pop();
124
125 // Combine the two elements
126 T combined = combine(e1, e2);
127 pq.push(combined);
128 }
129
130 return pq.top();
131}
132
133} // namespace synth
134} // namespace circt
135
136#endif // CIRCT_DIALECT_SYNTH_SYNTHOPS_H
assert(baseType &&"element must be base type")
Helper class for delay-aware tree building.
Definition SynthOps.h:58
ValueWithArrivalTime(mlir::Value value, int64_t arrivalTime, bool invert, size_t valueNumbering=0)
Definition SynthOps.h:72
mlir::Value getValue() const
Definition SynthOps.h:77
ValueWithArrivalTime & flipInversion()
Definition SynthOps.h:81
size_t valueNumbering
Value numbering for deterministic ordering when arrival times are equal.
Definition SynthOps.h:69
int64_t arrivalTime
The arrival time (delay) of this value in the circuit.
Definition SynthOps.h:64
llvm::PointerIntPair< mlir::Value, 1, bool > value
The value and an optional inversion flag packed together.
Definition SynthOps.h:61
bool operator>(const ValueWithArrivalTime &other) const
Comparison operator for priority queue.
Definition SynthOps.h:89
LogicalResult topologicallySortGraphRegionBlocks(mlir::Operation *op, llvm::function_ref< bool(mlir::Value, mlir::Operation *)> isOperandReady)
This function performs a topological sort on the operations within each block of graph regions in the...
Definition SynthOps.cpp:306
T buildBalancedTreeWithArrivalTimes(llvm::ArrayRef< T > elements, llvm::function_ref< T(T, T)> combine)
Build a balanced binary tree using a priority queue to greedily pair elements with earliest arrival t...
Definition SynthOps.h:105
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
Definition synth.py:1
mlir::LogicalResult matchAndRewrite(aig::AndInverterOp op, mlir::PatternRewriter &rewriter) const override
Definition SynthOps.cpp:294