PrettifyVerilog.cpp File Reference

#include "circt/Dialect/Comb/CombOps.h"
#include "circt/Dialect/HW/HWOps.h"
#include "circt/Dialect/SV/SVOps.h"
#include "circt/Dialect/SV/SVPasses.h"
#include "circt/Support/LoweringOptions.h"
#include "mlir/IR/ImplicitLocOpBuilder.h"
#include "mlir/IR/Matchers.h"
#include "mlir/Pass/Pass.h"
#include "llvm/ADT/TypeSwitch.h"
#include "circt/Dialect/SV/SVPasses.h.inc"

Include dependency graph for PrettifyVerilog.cpp:

Go to the source code of this file.

Namespaces
namespace	circt
	The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
namespace	circt::sv

Macros
#define	GEN_PASS_DEF_PRETTIFYVERILOG

Functions
static bool	isVerilogUnaryOperator (Operation *op)
	Return true if this is something that will get printed as a unary operator by the Verilog printer.
static std::optional< APInt >	getInt (Value value)
	Helper to convert a value to a constant integer if it is one.
static bool	isSelfWrite (Value dst, Value src)
static unsigned	getBlockDepth (Block *block, Block *topBlock)

Macro Definition Documentation

GEN_PASS_DEF_PRETTIFYVERILOG

#define GEN_PASS_DEF_PRETTIFYVERILOG

Definition at line 33 of file PrettifyVerilog.cpp.

Function Documentation

getBlockDepth()

static unsigned getBlockDepth ( Block *  block, Block *  topBlock  )

static

Definition at line 398 of file PrettifyVerilog.cpp.

getInt()

static std::optional< APInt > getInt ( Value  value )

static

Helper to convert a value to a constant integer if it is one.

Definition at line 84 of file PrettifyVerilog.cpp.

Referenced by circt::seq::FirMemory::FirMemory(), getSubModuleName(), and isSelfWrite().

isSelfWrite()

static bool isSelfWrite ( Value  dst, Value  src  )

static

Definition at line 93 of file PrettifyVerilog.cpp.

References getInt(), and isSelfWrite().

Referenced by isSelfWrite().

isVerilogUnaryOperator()

static bool isVerilogUnaryOperator ( Operation *  op )

static

Return true if this is something that will get printed as a unary operator by the Verilog printer.

Definition at line 70 of file PrettifyVerilog.cpp.