CIRCT  20.0.0git
LoweringOptions.h
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1 //===- LoweringOptions.h - CIRCT Lowering Options ---------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Options for controlling the lowering process and verilog exporting.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef CIRCT_SUPPORT_LOWERINGOPTIONS_H
14 #define CIRCT_SUPPORT_LOWERINGOPTIONS_H
15 
16 #include "mlir/IR/BuiltinAttributes.h"
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/ADT/Twine.h"
19 
20 namespace mlir {
21 class ModuleOp;
22 }
23 
24 namespace circt {
25 
26 /// Options which control the emission from CIRCT to Verilog.
28  /// Error callback type used to indicate errors parsing the options string.
29  using ErrorHandlerT = llvm::function_ref<void(llvm::Twine)>;
30 
31  /// Create a LoweringOptions with the default values.
32  LoweringOptions() = default;
33 
34  /// Create a LoweringOptions and read in options from a string,
35  /// overriding only the set options in the string.
36  LoweringOptions(llvm::StringRef options, ErrorHandlerT errorHandler);
37 
38  /// Create a LoweringOptions with values loaded from an MLIR ModuleOp. This
39  /// loads a string attribute with the key `circt.loweringOptions`. If there is
40  /// an error parsing the attribute this will print an error using the
41  /// ModuleOp.
42  LoweringOptions(mlir::ModuleOp module);
43 
44  /// Return the value of the `circt.loweringOptions` in the specified module
45  /// if present, or a null attribute if not.
46  static mlir::StringAttr getAttributeFrom(mlir::ModuleOp module);
47 
48  /// Read in options from a string, overriding only the set options in the
49  /// string.
50  void parse(llvm::StringRef options, ErrorHandlerT callback);
51 
52  /// Returns a string representation of the options.
53  std::string toString() const;
54 
55  /// Write the verilog emitter options to a module's attributes.
56  void setAsAttribute(mlir::ModuleOp module);
57 
58  /// Load any emitter options from the module. If there is an error validating
59  /// the attribute, this will print an error using the ModuleOp.
60  void parseFromAttribute(mlir::ModuleOp module);
61 
62  /// If true, emits `sv.alwayscomb` as Verilog `always @(*)` statements.
63  /// Otherwise, print them as `always_comb`.
64  bool noAlwaysComb = false;
65 
66  /// If true, expressions are allowed in the sensitivity list of `always`
67  /// statements, otherwise they are forced to be simple wires. Some EDA
68  /// tools rely on these being simple wires.
70 
71  /// If true, eliminate packed arrays for tools that don't support them (e.g.
72  /// Yosys).
73  bool disallowPackedArrays = false;
74 
75  /// If true, eliminate packed struct assignments in favor of a wire +
76  /// assignments to the individual fields.
78 
79  /// If true, do not emit SystemVerilog locally scoped "automatic" or logic
80  /// declarations - emit top level wire and reg's instead.
81  bool disallowLocalVariables = false;
82 
83  /// If true, verification statements like `assert`, `assume`, and `cover` will
84  /// always be emitted with a label. If the statement has no label in the IR, a
85  /// generic one will be created. Some EDA tools require verification
86  /// statements to be labeled.
87  bool enforceVerifLabels = false;
88 
89  /// This is the maximum number of terms in an expression before that
90  /// expression spills a wire.
91  enum { DEFAULT_TERM_LIMIT = 256 };
93 
94  /// This is the target width of lines in an emitted Verilog source file in
95  /// columns.
96  enum { DEFAULT_LINE_LENGTH = 90 };
98 
99  /// Add an explicit bitcast for avoiding bitwidth mismatch LINT errors.
100  bool explicitBitcast = false;
101 
102  /// If true, replicated ops are emitted to a header file.
104 
105  /// This option controls emitted location information style.
107  Plain, // Default.
108  WrapInAtSquareBracket, // Wrap location info in @[..].
109  None, // No location info comment.
111 
112  /// If true, every port is declared separately
113  /// (each includes direction and type (e.g., `input [3:0]`)).
114  /// When false (default), ports share declarations when possible.
116 
117  /// Print debug info.
118  bool printDebugInfo = false;
119 
120  /// If true, every mux expression is spilled to a wire.
121  bool disallowMuxInlining = false;
122 
123  /// This controls extra wire spilling performed in PrepareForEmission to
124  /// improve readablitiy and debuggability.
125  enum WireSpillingHeuristic : unsigned {
126  SpillLargeTermsWithNamehints = 1, // Spill wires for expressions with
127  // namehints if the term size is greater
128  // than `wireSpillingNamehintTermLimit`.
129  };
130 
132 
134  return static_cast<bool>(wireSpillingHeuristicSet & heurisic);
135  }
136 
139 
140  /// If true, every expression passed to an instance port is driven by a wire.
141  /// Some lint tools dislike expressions being inlined into input ports so this
142  /// option avoids such warnings.
144 
145  /// If true, every expression used as an array index is driven by a wire, and
146  /// the wire is marked as `(* keep = "true" *)`. Certain versions of Vivado
147  /// produce incorrect synthesis results for certain arithmetic ops inlined
148  /// into the array index.
150 
151  /// If true, emit `wire` in port lists rather than nothing. Used in cases
152  /// where `default_nettype is not set to wire.
153  bool emitWireInPorts = false;
154 
155  /// If true, emit a comment wherever an instance wasn't printed, because
156  /// it's emitted elsewhere as a bind.
157  bool emitBindComments = false;
158 
159  /// If true, do not emit a version comment at the top of each verilog file.
160  bool omitVersionComment = false;
161 
162  /// If true, then unique names that collide with keywords case insensitively.
163  /// This is used to avoid stricter lint warnings which, e.g., treat "REG" as a
164  /// Verilog keyword.
166 
167  /// If true, then update the the mlir to include output verilog locations.
168  bool emitVerilogLocations = false;
169 
170  /// If true, add a dummy wire to empty modules to prevent tools from regarding
171  /// the module as blackbox.
172  bool fixUpEmptyModules = false;
173 };
174 } // namespace circt
175 
176 #endif // CIRCT_SUPPORT_LOWERINGOPTIONS_H
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
Definition: DebugAnalysis.h:21
Options which control the emission from CIRCT to Verilog.
bool isWireSpillingHeuristicEnabled(WireSpillingHeuristic heurisic) const
bool noAlwaysComb
If true, emits sv.alwayscomb as Verilog always @(*) statements.
bool mitigateVivadoArrayIndexConstPropBug
If true, every expression used as an array index is driven by a wire, and the wire is marked as (* ke...
bool disallowLocalVariables
If true, do not emit SystemVerilog locally scoped "automatic" or logic declarations - emit top level ...
bool omitVersionComment
If true, do not emit a version comment at the top of each verilog file.
bool enforceVerifLabels
If true, verification statements like assert, assume, and cover will always be emitted with a label.
bool disallowExpressionInliningInPorts
If true, every expression passed to an instance port is driven by a wire.
bool printDebugInfo
Print debug info.
llvm::function_ref< void(llvm::Twine)> ErrorHandlerT
Error callback type used to indicate errors parsing the options string.
LocationInfoStyle
This option controls emitted location information style.
unsigned maximumNumberOfTermsPerExpression
WireSpillingHeuristic
This controls extra wire spilling performed in PrepareForEmission to improve readablitiy and debuggab...
void setAsAttribute(mlir::ModuleOp module)
Write the verilog emitter options to a module's attributes.
enum circt::LoweringOptions::LocationInfoStyle locationInfoStyle
unsigned wireSpillingNamehintTermLimit
bool disallowPortDeclSharing
If true, every port is declared separately (each includes direction and type (e.g....
bool disallowPackedArrays
If true, eliminate packed arrays for tools that don't support them (e.g.
LoweringOptions(llvm::StringRef options, ErrorHandlerT errorHandler)
Create a LoweringOptions and read in options from a string, overriding only the set options in the st...
bool explicitBitcast
Add an explicit bitcast for avoiding bitwidth mismatch LINT errors.
bool disallowMuxInlining
If true, every mux expression is spilled to a wire.
bool fixUpEmptyModules
If true, add a dummy wire to empty modules to prevent tools from regarding the module as blackbox.
bool disallowPackedStructAssignments
If true, eliminate packed struct assignments in favor of a wire + assignments to the individual field...
void parse(llvm::StringRef options, ErrorHandlerT callback)
Read in options from a string, overriding only the set options in the string.
static mlir::StringAttr getAttributeFrom(mlir::ModuleOp module)
Return the value of the circt.loweringOptions in the specified module if present, or a null attribute...
bool caseInsensitiveKeywords
If true, then unique names that collide with keywords case insensitively.
void parseFromAttribute(mlir::ModuleOp module)
Load any emitter options from the module.
bool emitWireInPorts
If true, emit wire in port lists rather than nothing.
bool emitReplicatedOpsToHeader
If true, replicated ops are emitted to a header file.
std::string toString() const
Returns a string representation of the options.
LoweringOptions()=default
Create a LoweringOptions with the default values.
bool allowExprInEventControl
If true, expressions are allowed in the sensitivity list of always statements, otherwise they are for...
bool emitVerilogLocations
If true, then update the the mlir to include output verilog locations.
bool emitBindComments
If true, emit a comment wherever an instance wasn't printed, because it's emitted elsewhere as a bind...