CIRCT  18.0.0git
HWOps.h
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1 //===- HWOps.h - Declare HW dialect operations ------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the operation classes for the HW dialect.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef CIRCT_DIALECT_HW_OPS_H
14 #define CIRCT_DIALECT_HW_OPS_H
15 
20 #include "mlir/IR/BuiltinOps.h"
21 #include "mlir/IR/ImplicitLocOpBuilder.h"
22 #include "mlir/IR/OpImplementation.h"
23 #include "mlir/IR/RegionKindInterface.h"
24 #include "mlir/IR/SymbolTable.h"
25 #include "mlir/Interfaces/ControlFlowInterfaces.h"
26 #include "mlir/Interfaces/FunctionInterfaces.h"
27 #include "mlir/Interfaces/InferTypeOpInterface.h"
28 #include "mlir/Interfaces/SideEffectInterfaces.h"
29 #include "llvm/ADT/StringExtras.h"
30 
31 namespace circt {
32 namespace hw {
33 
34 class EnumFieldAttr;
35 
36 /// Flip a port direction.
38 
39 /// TODO: Move all these functions to a hw::ModuleLike interface.
40 
41 /// Insert and remove ports of a module. The insertion and removal indices must
42 /// be in ascending order. The indices refer to the port positions before any
43 /// insertion or removal occurs. Ports inserted at the same index will appear in
44 /// the module in the same order as they were listed in the `insert*` array.
45 /// If 'body' is provided, additionally inserts/removes the corresponding
46 /// block arguments.
47 void modifyModulePorts(Operation *op,
48  ArrayRef<std::pair<unsigned, PortInfo>> insertInputs,
49  ArrayRef<std::pair<unsigned, PortInfo>> insertOutputs,
50  ArrayRef<unsigned> removeInputs,
51  ArrayRef<unsigned> removeOutputs, Block *body = nullptr);
52 
53 // Helpers for working with modules.
54 
55 /// Return true if isAnyModule or instance.
56 bool isAnyModuleOrInstance(Operation *module);
57 
58 /// Return the signature for the specified module as a function type.
59 FunctionType getModuleType(Operation *module);
60 
61 /// Returns the verilog module name attribute or symbol name of any module-like
62 /// operations.
63 StringAttr getVerilogModuleNameAttr(Operation *module);
64 inline StringRef getVerilogModuleName(Operation *module) {
65  return getVerilogModuleNameAttr(module).getValue();
66 }
67 
68 // Index width should be exactly clog2 (size of array), or either 0 or 1 if the
69 // array is a singleton.
70 bool isValidIndexBitWidth(Value index, Value array);
71 
72 /// Return true if the specified operation is a combinational logic op.
73 bool isCombinational(Operation *op);
74 
75 /// Return true if the specified attribute tree is made up of nodes that are
76 /// valid in a parameter expression.
77 bool isValidParameterExpression(Attribute attr, Operation *module);
78 
79 /// Check parameter specified by `value` to see if it is valid within the scope
80 /// of the specified module `module`. If not, emit an error at the location of
81 /// `usingOp` and return failure, otherwise return success.
82 ///
83 /// If `disallowParamRefs` is true, then parameter references are not allowed.
84 LogicalResult checkParameterInContext(Attribute value, Operation *module,
85  Operation *usingOp,
86  bool disallowParamRefs = false);
87 
88 /// Check parameter specified by `value` to see if it is valid according to the
89 /// module's parameters. If not, emit an error to the diagnostic provided as an
90 /// argument to the lambda 'instanceError' and return failure, otherwise return
91 /// success.
92 ///
93 /// If `disallowParamRefs` is true, then parameter references are not allowed.
94 LogicalResult checkParameterInContext(
95  Attribute value, ArrayAttr moduleParameters,
96  const std::function<void(std::function<bool(InFlightDiagnostic &)>)>
97  &instanceError,
98  bool disallowParamRefs = false);
99 
100 // Check whether an integer value is an offset from a base.
101 bool isOffset(Value base, Value index, uint64_t offset);
102 
103 // A class for providing access to the in- and output ports of a module through
104 // use of the HWModuleBuilder.
106 
107 public:
108  HWModulePortAccessor(Location loc, const ModulePortInfo &info,
109  Region &bodyRegion);
110 
111  // Returns the i'th/named input port of the module.
112  Value getInput(unsigned i);
113  Value getInput(StringRef name);
114  ValueRange getInputs() { return inputArgs; }
115 
116  // Assigns the i'th/named output port of the module.
117  void setOutput(unsigned i, Value v);
118  void setOutput(StringRef name, Value v);
119 
120  const ModulePortInfo &getPortList() const { return info; }
121  const llvm::SmallVector<Value> &getOutputOperands() const {
122  return outputOperands;
123  }
124 
125 private:
126  llvm::StringMap<unsigned> inputIdx, outputIdx;
127  llvm::SmallVector<Value> inputArgs;
128  llvm::SmallVector<Value> outputOperands;
130 };
131 
133  llvm::function_ref<void(OpBuilder &, HWModulePortAccessor &)>;
134 
135 } // namespace hw
136 } // namespace circt
137 
138 #define GET_OP_CLASSES
139 #include "circt/Dialect/HW/HW.h.inc"
140 
141 #endif // CIRCT_DIALECT_HW_OPS_H
lowerAnnotationsNoRefTypePorts FirtoolPreserveValuesMode value
Definition: Firtool.cpp:95
void setOutput(unsigned i, Value v)
Definition: HWOps.cpp:240
Value getInput(unsigned i)
Definition: HWOps.cpp:246
llvm::SmallVector< Value > outputOperands
Definition: HWOps.h:128
llvm::SmallVector< Value > inputArgs
Definition: HWOps.h:127
llvm::StringMap< unsigned > outputIdx
Definition: HWOps.h:126
llvm::StringMap< unsigned > inputIdx
Definition: HWOps.h:126
const ModulePortInfo & getPortList() const
Definition: HWOps.h:120
HWModulePortAccessor(Location loc, const ModulePortInfo &info, Region &bodyRegion)
Definition: HWOps.cpp:224
const llvm::SmallVector< Value > & getOutputOperands() const
Definition: HWOps.h:121
bool isOffset(Value base, Value index, uint64_t offset)
Definition: HWOps.cpp:1747
llvm::function_ref< void(OpBuilder &, HWModulePortAccessor &)> HWModuleBuilder
Definition: HWOps.h:133
bool isCombinational(Operation *op)
Return true if the specified operation is a combinational logic op.
Definition: HWOps.cpp:58
void modifyModulePorts(Operation *op, ArrayRef< std::pair< unsigned, PortInfo >> insertInputs, ArrayRef< std::pair< unsigned, PortInfo >> insertOutputs, ArrayRef< unsigned > removeInputs, ArrayRef< unsigned > removeOutputs, Block *body=nullptr)
TODO: Move all these functions to a hw::ModuleLike interface.
Definition: HWOps.cpp:684
StringRef getVerilogModuleName(Operation *module)
Definition: HWOps.h:64
ModulePort::Direction flip(ModulePort::Direction direction)
Flip a port direction.
Definition: HWOps.cpp:35
FunctionType getModuleType(Operation *module)
Return the signature for the specified module as a function type.
Definition: HWOps.cpp:518
LogicalResult checkParameterInContext(Attribute value, Operation *module, Operation *usingOp, bool disallowParamRefs=false)
Check parameter specified by value to see if it is valid within the scope of the specified module mod...
Definition: HWOps.cpp:201
bool isValidParameterExpression(Attribute attr, Operation *module)
Return true if the specified attribute tree is made up of nodes that are valid in a parameter express...
Definition: HWOps.cpp:220
bool isValidIndexBitWidth(Value index, Value array)
Definition: HWOps.cpp:47
bool isAnyModuleOrInstance(Operation *module)
Return true if isAnyModule or instance.
Definition: HWOps.cpp:512
StringAttr getVerilogModuleNameAttr(Operation *module)
Returns the verilog module name attribute or symbol name of any module-like operations.
Definition: HWOps.cpp:536
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
Definition: DebugAnalysis.h:21
Definition: hw.py:1
This holds a decoded list of input/inout and output ports for a module or instance.