CIRCT 20.0.0git
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HWOps.h
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1//===- HWOps.h - Declare HW dialect operations ------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the operation classes for the HW dialect.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef CIRCT_DIALECT_HW_OPS_H
14#define CIRCT_DIALECT_HW_OPS_H
15
22#include "mlir/IR/BuiltinOps.h"
23#include "mlir/IR/ImplicitLocOpBuilder.h"
24#include "mlir/IR/OpImplementation.h"
25#include "mlir/IR/RegionKindInterface.h"
26#include "mlir/IR/SymbolTable.h"
27#include "mlir/Interfaces/ControlFlowInterfaces.h"
28#include "mlir/Interfaces/FunctionInterfaces.h"
29#include "mlir/Interfaces/InferTypeOpInterface.h"
30#include "mlir/Interfaces/SideEffectInterfaces.h"
31#include "llvm/ADT/StringExtras.h"
32
33namespace circt {
34namespace hw {
35
36class EnumFieldAttr;
37
38/// Flip a port direction.
40
41/// TODO: Move all these functions to a hw::ModuleLike interface.
42
43// Helpers for working with modules.
44
45/// Return true if isAnyModule or instance.
46bool isAnyModuleOrInstance(Operation *module);
47
48/// Return the signature for the specified module as a function type.
49FunctionType getModuleType(Operation *module);
50
51/// Returns the verilog module name attribute or symbol name of any module-like
52/// operations.
53StringAttr getVerilogModuleNameAttr(Operation *module);
54inline StringRef getVerilogModuleName(Operation *module) {
55 return getVerilogModuleNameAttr(module).getValue();
56}
57
58// Index width should be exactly clog2 (size of array), or either 0 or 1 if the
59// array is a singleton.
60bool isValidIndexBitWidth(Value index, Value array);
61
62/// Return true if the specified operation is a combinational logic op.
63bool isCombinational(Operation *op);
64
65/// Return true if the specified attribute tree is made up of nodes that are
66/// valid in a parameter expression.
67bool isValidParameterExpression(Attribute attr, Operation *module);
68
69/// Check parameter specified by `value` to see if it is valid within the scope
70/// of the specified module `module`. If not, emit an error at the location of
71/// `usingOp` and return failure, otherwise return success.
72///
73/// If `disallowParamRefs` is true, then parameter references are not allowed.
74LogicalResult checkParameterInContext(Attribute value, Operation *module,
75 Operation *usingOp,
76 bool disallowParamRefs = false);
77
78/// Check parameter specified by `value` to see if it is valid according to the
79/// module's parameters. If not, emit an error to the diagnostic provided as an
80/// argument to the lambda 'instanceError' and return failure, otherwise return
81/// success.
82///
83/// If `disallowParamRefs` is true, then parameter references are not allowed.
84LogicalResult checkParameterInContext(
85 Attribute value, ArrayAttr moduleParameters,
86 const std::function<void(std::function<bool(InFlightDiagnostic &)>)>
87 &instanceError,
88 bool disallowParamRefs = false);
89
90// Check whether an integer value is an offset from a base.
91bool isOffset(Value base, Value index, uint64_t offset);
92
93// A class for providing access to the in- and output ports of a module through
94// use of the HWModuleBuilder.
96
97public:
98 HWModulePortAccessor(Location loc, const ModulePortInfo &info,
99 Region &bodyRegion);
100
101 // Returns the i'th/named input port of the module.
102 Value getInput(unsigned i);
103 Value getInput(StringRef name);
104 ValueRange getInputs() { return inputArgs; }
105
106 // Assigns the i'th/named output port of the module.
107 void setOutput(unsigned i, Value v);
108 void setOutput(StringRef name, Value v);
109
110 const ModulePortInfo &getPortList() const { return info; }
111 const llvm::SmallVector<Value> &getOutputOperands() const {
112 return outputOperands;
113 }
114
115private:
116 llvm::StringMap<unsigned> inputIdx, outputIdx;
117 llvm::SmallVector<Value> inputArgs;
118 llvm::SmallVector<Value> outputOperands;
120};
121
123 llvm::function_ref<void(OpBuilder &, HWModulePortAccessor &)>;
124
125} // namespace hw
126} // namespace circt
127
128#define GET_OP_CLASSES
129#include "circt/Dialect/HW/HW.h.inc"
130
131#endif // CIRCT_DIALECT_HW_OPS_H
void setOutput(unsigned i, Value v)
Definition HWOps.cpp:241
const ModulePortInfo & getPortList() const
Definition HWOps.h:110
Value getInput(unsigned i)
Definition HWOps.cpp:247
const llvm::SmallVector< Value > & getOutputOperands() const
Definition HWOps.h:111
llvm::SmallVector< Value > outputOperands
Definition HWOps.h:118
llvm::SmallVector< Value > inputArgs
Definition HWOps.h:117
llvm::StringMap< unsigned > outputIdx
Definition HWOps.h:116
llvm::StringMap< unsigned > inputIdx
Definition HWOps.h:116
bool isOffset(Value base, Value index, uint64_t offset)
Definition HWOps.cpp:1834
llvm::function_ref< void(OpBuilder &, HWModulePortAccessor &)> HWModuleBuilder
Definition HWOps.h:123
bool isCombinational(Operation *op)
Return true if the specified operation is a combinational logic op.
Definition HWOps.cpp:59
StringRef getVerilogModuleName(Operation *module)
Definition HWOps.h:54
ModulePort::Direction flip(ModulePort::Direction direction)
Flip a port direction.
Definition HWOps.cpp:36
FunctionType getModuleType(Operation *module)
Return the signature for the specified module as a function type.
Definition HWOps.cpp:521
LogicalResult checkParameterInContext(Attribute value, Operation *module, Operation *usingOp, bool disallowParamRefs=false)
Check parameter specified by value to see if it is valid within the scope of the specified module mod...
Definition HWOps.cpp:202
bool isValidParameterExpression(Attribute attr, Operation *module)
Return true if the specified attribute tree is made up of nodes that are valid in a parameter express...
Definition HWOps.cpp:221
bool isValidIndexBitWidth(Value index, Value array)
Definition HWOps.cpp:48
bool isAnyModuleOrInstance(Operation *module)
TODO: Move all these functions to a hw::ModuleLike interface.
Definition HWOps.cpp:515
StringAttr getVerilogModuleNameAttr(Operation *module)
Returns the verilog module name attribute or symbol name of any module-like operations.
Definition HWOps.cpp:539
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
Definition hw.py:1
This holds a decoded list of input/inout and output ports for a module or instance.