8from ..dialects._ods_common
import _cext
as _ods_cext
9from ..ir
import ArrayAttr, Attribute, FlatSymbolRefAttr, OpView, StringAttr
10from ._sv_ops_gen
import *
11from ._sv_ops_gen
import _Dialect
13from typing
import List, Optional
16@_ods_cext.register_operation(_Dialect, replace=True)
19 def __init__(self, cond: Attribute, *, loc=
None, ip=
None):
22 attributes = {
"cond": cond}
25 self.build_generic(attributes=attributes,
32 self.regions[0].blocks.append()
33 self.regions[1].blocks.append()
36@_ods_cext.register_operation(_Dialect, replace=True)
47 attributes = {
"name": StringAttr.get(name)}
48 if sym_name
is not None:
49 attributes[
"inner_sym"] = hw.InnerSymAttr.get(StringAttr.get(sym_name))
50 if svAttributes
is not None:
51 attributes[
"svAttributes"] = ArrayAttr.get(svAttributes)
54 self.build_generic(attributes=attributes,
63 def create(data_type, name=None, sym_name=None):
64 if not isinstance(data_type, hw.InOutType):
65 data_type = hw.InOutType.get(data_type)
66 return sv.WireOp(data_type, name, sym_name=sym_name)
69@_ods_cext.register_operation(_Dialect, replace=True)
80 attributes = {
"name": StringAttr.get(name)}
81 if sym_name
is not None:
82 attributes[
"inner_sym"] = hw.InnerSymAttr.get(StringAttr.get(sym_name))
83 if svAttributes
is not None:
84 attributes[
"svAttributes"] = ArrayAttr.get(svAttributes)
87 self.build_generic(attributes=attributes,
96@_ods_cext.register_operation(_Dialect, replace=True)
104@_ods_cext.register_operation(_Dialect, replace=True)
109 value = support.get_value(value)
110 type = support.get_self_or_inner(value.type).element_type
114@_ods_cext.register_operation(_Dialect, replace=True)
123 additional_files=None,
128 attributes[
"sym_name"] = StringAttr.get(str(sym_name))
129 attributes[
"content"] = StringAttr.get(str(content))
130 attributes[
"output_file"] = output_file
132 if parameters
is not None:
133 attributes[
"parameters"] = parameters
135 attributes[
"parameters"] = ArrayAttr.get([])
137 if additional_files
is not None:
138 attributes[
"additional_files"] = additional_files
140 if verilog_name
is not None:
141 attributes[
"verilogName"] = StringAttr.get(str(verilog_name))
145 if name.endswith(
'.v'):
146 attributes[
"verilogName"] = StringAttr.get(name[:-2])
148 attributes[
"verilogName"] = StringAttr.get(name)
152 self.build_generic(attributes=attributes,
161@_ods_cext.register_operation(_Dialect, replace=True)
175 attributes = dict(attributes)
176 attributes[
"source"] = source
178 if parameters
is not None:
179 attributes[
"parameters"] = parameters
181 attributes[
"parameters"] = ArrayAttr.get([])
183 if verilog_name
is not None:
184 attributes[
"verilogName"] = StringAttr.get(str(verilog_name))
190 parameters=parameters
if parameters
is not None else [],
191 attributes=attributes,
216VerbatimSourceOp = SVVerbatimSourceOp
217VerbatimModuleOp = SVVerbatimModuleOp
list[ParamDeclAttr] parameters(op)
instantiate(op, str name, Dict[str, object] parameters={}, results=None, sym_name=None, loc=None, ip=None, **kwargs)
init(op, name, input_ports=[], output_ports=[], *parameters=[], attributes={}, body_builder=None, loc=None, ip=None)
__init__(self, Attribute cond, *loc=None, ip=None)
__init__(self, data_type, name, *sym_name=None, svAttributes=None, loc=None, ip=None)
instantiate(self, *args, **kwargs)
__init__(self, name, source, input_ports=[], output_ports=[], *parameters=None, verilog_name=None, attributes={}, loc=None, ip=None)
list[hw.ParamDeclAttr] parameters(self)
__init__(self, sym_name, content, output_file, *parameters=None, additional_files=None, verilog_name=None, loc=None, ip=None)
__init__(self, data_type, name, *sym_name=None, svAttributes=None, loc=None, ip=None)
create(data_type, name=None, sym_name=None)