- i -
- id
: circt::FieldRef
, esi::BundlePort
, esi::Instance
, esi::services::CustomService
, esi::Type
- idTable
: StructuralHasher
- idx
: circt::ImportVerilog::HierPathInfo
, esi::AppID
- ifCache
: circt::FirRegLowering
- ifOp
: circt::scftocalyx::IfScheduleable
- ignoreDirectives
: circt::ImportVerilogOptions
- ignoreReadEnableMem
: circt::firtool::FirtoolOptions
- ignoreUnknownModules
: circt::ImportVerilogOptions
- impl
: circt::calyx::MemoryInterface
, circt::calyx::RepeatOpInterface< T >
, circt::calyx::WhileOpInterface< T >
, circt::ExportSystemC::FrozenEmissionPatternSet< PatternTy, KeyTy >
, circt::firrtl::AnnoTarget
, circt::SymbolCacheBase::Iterator
, esi::AcceleratorServiceThread
, esi::backends::trace::TraceAccelerator
, esi::backends::xrt::XrtAccelerator
, esi::cosim::RpcServer
, esi::Manifest
, TraceHostMem
, TraceHostMem::TraceHostMemRegion
, TraceMMIO
- implOptions
: esi::ChannelAssignment
, esi::HWClientDetail
- includeDirs
: circt::ImportVerilogOptions
- includeSystemDirs
: circt::ImportVerilogOptions
- incomingDelay
: circt::scheduling::ChainingProblem
- indent
: circt::pretty::PrettyPrinter
- indentLetBody
: circt::ExportSMTLIB::SMTEmissionOptions
- inDesign
: circt::firrtl::InstanceInfo::ModuleAttributes
- index
: circt::handshake::MemLoadInterface
, circt::handshake::MemStoreInterface
, PyAppIDIndex
, Python.support.OpOperand
- indexEdge
: circt::handshake::HandshakeLowering::MergeOpInfo
- inEffectiveDesign
: circt::firrtl::InstanceInfo::ModuleAttributes
- inferredTopLevelNodes
: circt::igraph::InstanceGraph
- info
: circt::hw::HWModulePortAccessor
, circt::pretty::Token
, esi::HWModule
- infoLoc
: FIRParser::LocWithInfo
- infoLocatorHandling
: circt::firrtl::FIRParserOptions
- init
: circt::firrtl::FirMemory
- initFilename
: circt::FirMemConfig
, circt::seq::FirMemory
- initGroups
: circt::pipelinetocalyx::PipelineScheduleable
- initialFnSym
: circt::arc::ModelInfo
- initiationInterval
: circt::scheduling::CyclicProblem
- initIsBinary
: circt::FirMemConfig
, circt::seq::FirMemory
- initIsInline
: circt::FirMemConfig
, circt::seq::FirMemory
- inlineSingleUseValues
: circt::ExportSMTLIB::SMTEmissionOptions
- inner
: esi::ChannelType
- innerRefs
: InnerSymbolDCEPass
- innerSymAttr
: StructuralHasherSharedConstants
- innerSymIDTable
: StructuralHasher
- innerSymTables
: circt::hw::InnerRefNamespace
- innerSymTblOp
: circt::hw::InnerSymbolTable
- innerType
: circt::firrtl::detail::BaseTypeAliasStorage
- inputArgs
: circt::hw::HWModulePortAccessor
- inputIdx
: circt::hw::HWModulePortAccessor
- inputPortMap
: circt::hw::ModulePortLookupInfo
- inputPorts
: circt::calyx::PredicateInfo
- inputToAbs
: circt::hw::detail::ModuleTypeStorage
- instance
: circt::igraph::InstanceRecord
, circt::om::PathElement
- instance_of
: Python.support.BackedgeBuilder.Edge
- instanceAllocator
: circt::DebugInfo
- instanceGraph
: circt::firrtl::OwningModuleCache
, circt::igraph::InstancePathCache
, Deduper
, DiscoverLoops
, Equivalence
, ModuleExternalizer
- instanceMap
: CallPrepPrecomputed
, circt::calyx::ComponentLoweringStateInterface
- instanceName
: circt::scheduling::Problem
- instanceOp
: circt::scftocalyx::CallScheduleable
- instancePathCache
: circt::firrtl::ApplyState
- instanceProperties
: circt::ssp::Default< scheduling::ChainingCyclicProblem >
, circt::ssp::Default< scheduling::ChainingProblem >
, circt::ssp::Default< scheduling::CyclicProblem >
, circt::ssp::Default< scheduling::ModuloProblem >
, circt::ssp::Default< scheduling::Problem >
, circt::ssp::Default< scheduling::SharedOperatorsProblem >
- instances
: circt::DIModule
, circt::firrtl::AnnoPathValue
, circt::firrtl::TokenAnnoTarget
, circt::igraph::InstanceGraphNode
, llvm::yaml::MappingContextTraits< sv::InterfaceOp, Context >::Interface
- int_width_support
: esiaccel.codegen.CppGenerator
- intAttr
: circt::sv::CaseBitPattern
- interesting
: circt::TestCase
- interface
: llvm::yaml::MappingContextTraits< DescribedInstance, Context >::Instance
- intoModuleOp
: circt::ImportVerilog::Context
- invalidPort
: circt::hw::InnerSymTarget
- invert
: circt::calyx::PredicateInfo::InputPorts
- ip
: esi::backends::xrt::XrtAccelerator::Impl
- isConst
: circt::firrtl::detail::FIRRTLBaseTypeStorage
, circt::firrtl::detail::OpenBundleTypeStorage
, circt::firrtl::detail::OpenVectorTypeStorage
- isContentEn
: circt::calyx::MemoryPortsImpl
- isExtern
: circt::DIModule
- isFailure
: circt::ExportSystemC::MatchResult
- isFIRRTLBaseType
: circt::firrtl::ContainAliasableTypes< BaseTy >
- isFIRRTLType
: circt::firrtl::ContainAliasableTypes< BaseTy >
- isFlip
: FIRRTLBundleField
- isFrozen
: circt::hw::HWSymbolCache
- isHeader
: circt::ExportVerilog::FileInfo
- isIndex
: circt::firrtl::TargetToken
- isInDut
: circt::firrtl::FirMemory
- isInline
: circt::DIModule
- isMasked
: circt::firrtl::FirMemory
- isPassive
: circt::firrtl::RecursiveTypeProperties
- istc
: ResolveTracesPass
- isUntouchedFlag
: circt::hw::PortConversion
- isVerilog
: circt::ExportVerilog::FileInfo
- it
: circt::hw::HWSymbolCache::HwSymbolCacheIteratorImpl
, circt::SymbolCache::SymbolCacheIteratorImpl