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• language : esiaccel.codegen.CppGenerator
• latency : circt::scheduling::Problem
• leftTotal : circt::pretty::PrettyPrinter
• legacyWiringProblems : circt::firrtl::ApplyState
• len : circt::pretty::Token::StringInfo
• length : circt::ExportVerilog::StringOrOpToEmit
• level : circt::VerbosePassInstrumentation< LoggedOpTypes >
• libDirs : circt::ImportVerilogOptions
• libExts : circt::ImportVerilogOptions
• librariesInheritMacros : circt::ImportVerilogOptions
• libraryFiles : circt::ImportVerilogOptions
• libraryName : circt::scheduling::Problem
• limit : circt::scheduling::SharedOperatorsProblem
• line : circt::ExportVerilog::OpLocMap::LineColPair
• linkedOperatorType : circt::scheduling::Problem
• listener : circt::pretty::PrettyPrinter
• listeners : esi::AcceleratorServiceThread::Impl
• loc : circt::BackedgeBuilder , circt::DIVariable , circt::firrtl::FirMemory , circt::firrtl::PortInfo , circt::hw::PortInfo , circt::ImportVerilog::PortLowering , circt::om::evaluator::EvaluatorValue , Python.support.BackedgeBuilder.Edge
• locationInfoStyle : circt::LoweringOptions
• locked : circt::Namespace
• locOp : circt::msft::PlacementDB::PlacementCell
• logger : esi::Context
• logic : circt::calyx::PredicateInfo
• loopInitGroups : circt::calyx::LoopLoweringStateInterface< Loop >
• loopIterRegs : circt::calyx::LoopLoweringStateInterface< Loop >
• loopLatchGroups : circt::calyx::LoopLoweringStateInterface< Loop >
• loopStack : circt::ImportVerilog::Context
• lowerAnnotationsNoRefTypePorts : circt::firtool::FirtoolOptions
• loweredInputs : circt::hw::PortConverterImpl
• loweredOutputs : circt::hw::PortConverterImpl
• loweringRes : PartialLowerRegion
• loweringState : circt::pipelinetocalyx::LoopScheduleToCalyxPass
• lowerMemories : circt::firtool::FirtoolOptions
• lvalueStack : circt::ImportVerilog::Context