Here is a list of all variables with links to the classes they belong to:
- l -
- language : esiaccel.codegen.generator.CppGenerator, esiaccel.codegen.generator.Generator
- last : StreamingAddArg, StreamingAddResult
- lastChangeTime : circt::lsp::PendingChanges
- lastFieldOffset : esi::ChannelPort::TranslationInfo::ListFieldInfo
- lastServerError : esi::backends::cosim::RpcClient::Impl
- lastServerErrorMutex : esi::backends::cosim::RpcClient::Impl
- latency : circt::scheduling::Problem
- layerBlockGlobals : LowerLayersPass
- lazyComputation : circt::synth::LongestPathAnalysisOptions
- leftTotal : circt::pretty::PrettyPrinter
- legacyWiringProblems : circt::firrtl::ApplyState
- len : circt::pretty::Token::StringInfo
- length : circt::ExportVerilog::StringOrOpToEmit, synth.LongestPathCollection
- level : circt::VerbosePassInstrumentation< LoggedOpTypes >
- lhs : circt::comb::ReplExtMatcher< SubType >, circt::comb::SextByMatcher< SubType >, circt::comb::ZextByMatcher< SubType >
- libDirs : circt::ImportVerilogOptions, circt::lsp::VerilogServerOptions
- libExts : circt::ImportVerilogOptions
- librariesInheritMacros : circt::ImportVerilogOptions
- libraryFiles : circt::ImportVerilogOptions
- libraryName : circt::scheduling::Problem
- limit : circt::scheduling::SharedOperatorsProblem
- line : circt::ExportVerilog::OpLocMap::LineColPair
- lineOffsets : circt::lsp::VerilogDocument
- linkedOperatorType : circt::scheduling::Problem
- linkedResourceTypes : circt::scheduling::Problem
- lintStaticAsserts : circt::firtool::FirtoolOptions
- lintXmrsInDesign : circt::firtool::FirtoolOptions
- listDataBuffer : esi::ReadChannelPort
- listDataBufferOffset : esi::ChannelPort::TranslationInfo::ListFieldInfo
- listener : circt::pretty::PrettyPrinter
- listeners : esi::AcceleratorServiceThread
- listField : esi::ChannelPort::TranslationInfo::FrameInfo
- listLengthBufferOffset : esi::ChannelPort::TranslationInfo::ListFieldInfo
- literal : circt::arc::runtime::FmtDescriptor
- loc : circt::BackedgeBuilder, circt::datapath::CompressorTree, circt::DIVariable, circt::firrtl::FirMemory, circt::firrtl::GatedClockConversion::EnableNode, circt::firrtl::GatedClockConversion::WirePairPlan, circt::firrtl::PortInfo, circt::hw::PortInfo, circt::ImportVerilog::Context::PendingMonitor, circt::ImportVerilog::FlattenedIfacePort, circt::ImportVerilog::PortLowering, circt::om::evaluator::EvaluatorValue, OperationAnalyzer, Python.support.BackedgeBuilder.Edge
- local : circt::synth::ResourceUsageAnalysis::ModuleResourceUsage
- localVisitors : Context
- locationInfoStyle : circt::LoweringOptions
- locked : circt::Namespace
- locOp : circt::msft::PlacementDB::PlacementCell
- logger : esi::backends::cosim::RpcClient::Impl, esi::Context
- logic : circt::calyx::PredicateInfo
- logicNetwork : circt::synth::CutEnumerator
- long_description : Python.setup.NoopBuildExtension
- loopInitGroups : circt::calyx::LoopLoweringStateInterface< Loop >
- loopIterRegs : circt::calyx::LoopLoweringStateInterface< Loop >
- loopLatchGroups : circt::calyx::LoopLoweringStateInterface< Loop >
- loopStack : circt::ImportVerilog::Context
- lowerAlwaysAtStarAsComb : circt::ImportVerilogOptions
- lowerAnnotationsNoRefTypePorts : circt::firtool::FirtoolOptions
- lowered_type : esiaccel.types.WindowType
- loweredEnables : circt::firrtl::GatedClockConversion
- loweredInputs : circt::hw::PortConverterImpl
- loweredOutputs : circt::hw::PortConverterImpl
- loweredType : esi::WindowType
- loweringRes : PartialLowerRegion
- loweringState : circt::pipelinetocalyx::LoopScheduleToCalyxPass
- lowerMemories : circt::firtool::FirtoolOptions
- lowerToCore : circt::firtool::FirtoolOptions
- lvalueStack : circt::ImportVerilog::Context