CIRCT  18.0.0git
ESIDialect.h
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1 //===- ESIDialect.h - ESI dialect Dialect class -----------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // The Elastic Silicon Interconnect (ESI) dialect
10 //
11 // ESI is a system interconnect generator. It is type safe and
12 // latency-insensitive. It can be used for on-chip, inter-chip, and host-chip
13 // communication. It is also intended to help with incremental adoption and
14 // integration with existing RTL as it provides a standardized, typed interface
15 // to the outside world.
16 //
17 //===----------------------------------------------------------------------===//
18 
19 #ifndef CIRCT_DIALECT_ESI_ESIDIALECT_H
20 #define CIRCT_DIALECT_ESI_ESIDIALECT_H
21 
22 #include "circt/Dialect/HW/HWOps.h"
23 #include "circt/Support/LLVM.h"
24 #include "mlir/IR/BuiltinAttributes.h"
25 #include "mlir/IR/Dialect.h"
26 
27 namespace circt {
28 namespace esi {
29 
30 void registerESIPasses();
31 
32 /// Name of dialect attribute which governs whether or not to bundle (i.e. use
33 /// SystemVerilog interfaces) channel signal wires on external modules.
34 constexpr StringRef extModBundleSignalsAttrName = "esi.bundle";
35 
36 /// Name of dialect attribute which governs whether or not to flatten struct
37 /// ports into a bunch of individual 'data' wires.
38 constexpr StringRef extModPortFlattenStructsAttrName = "esi.portFlattenStructs";
39 
40 /// Suffix _all_ lowered input ports with this suffix. Defaults to nothing.
41 constexpr StringRef extModPortInSuffix = "esi.portInSuffix";
42 /// Suffix _all_ lowered output ports with this suffix. Defaults to nothing.
43 constexpr StringRef extModPortOutSuffix = "esi.portOutSuffix";
44 /// Suffix lowered valid ports with this suffix. Defaults to "_valid". Applies
45 /// only to ValidReady channels.
46 constexpr StringRef extModPortValidSuffix = "esi.portValidSuffix";
47 /// Suffix lowered ready ports with this suffix. Defaults to "_ready". Applies
48 /// only to ValidReady channels.
49 constexpr StringRef extModPortReadySuffix = "esi.portReadySuffix";
50 /// Suffix lowered read enable ports with this suffix. Defaults to "_rden".
51 /// Applies only to FIFO channels.
52 constexpr StringRef extModPortRdenSuffix = "esi.portRdenSuffix";
53 /// Suffix lowered empty ports with this suffix. Defaults to "_empty". Applies
54 /// only to FIFO channels.
55 constexpr StringRef extModPortEmptySuffix = "esi.portEmptySuffix";
56 
57 } // namespace esi
58 } // namespace circt
59 
60 #include "circt/Dialect/ESI/ESIDialect.h.inc"
61 
62 // Pull in all enum type definitions and utility function declarations.
63 #include "circt/Dialect/ESI/ESIEnums.h.inc"
64 
65 #endif
constexpr StringRef extModPortValidSuffix
Suffix lowered valid ports with this suffix.
Definition: ESIDialect.h:46
constexpr StringRef extModPortRdenSuffix
Suffix lowered read enable ports with this suffix.
Definition: ESIDialect.h:52
constexpr StringRef extModPortReadySuffix
Suffix lowered ready ports with this suffix.
Definition: ESIDialect.h:49
constexpr StringRef extModBundleSignalsAttrName
Name of dialect attribute which governs whether or not to bundle (i.e.
Definition: ESIDialect.h:34
constexpr StringRef extModPortInSuffix
Suffix all lowered input ports with this suffix. Defaults to nothing.
Definition: ESIDialect.h:41
constexpr StringRef extModPortOutSuffix
Suffix all lowered output ports with this suffix. Defaults to nothing.
Definition: ESIDialect.h:43
void registerESIPasses()
Definition: ESIPasses.cpp:260
constexpr StringRef extModPortEmptySuffix
Suffix lowered empty ports with this suffix.
Definition: ESIDialect.h:55
constexpr StringRef extModPortFlattenStructsAttrName
Name of dialect attribute which governs whether or not to flatten struct ports into a bunch of indivi...
Definition: ESIDialect.h:38
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
Definition: DebugAnalysis.h:21
Definition: esi.py:1