10 #include "mlir/IR/BuiltinOps.h"
12 using namespace circt;
13 using namespace firrtl;
16 if (
auto mod = dyn_cast<mlir::ModuleOp>(operation))
17 for (
auto &op : *mod.getBody())
18 if (
auto circuit = dyn_cast<CircuitOp>(&op))
20 return cast<CircuitOp>(operation);
30 DenseSet<InstanceGraphNode *> seen;
31 SmallVector<InstanceGraphNode *> worklist;
32 worklist.reserve(nodes.size());
33 seen.reserve(nodes.size());
35 for (
auto *n : nodes) {
36 auto *mod = n->getParent();
37 if (seen.insert(mod).second)
38 worklist.push_back(mod);
41 while (!worklist.empty()) {
42 auto *node = worklist.back();
52 for (
auto *use : node->uses()) {
53 auto *mod = use->getParent();
54 if (seen.insert(mod).second)
55 worklist.push_back(mod);
assert(baseType &&"element must be base type")
static CircuitOp findCircuitOp(Operation *operation)
This graph tracks modules and where they are instantiated.
InstanceGraphNode * topLevelNode
InstanceGraph(Operation *operation)
Create a new module graph of a circuit.
This is a Node in the InstanceGraph.
InstanceGraphNode * lookup(ModuleOpInterface op)
Look up an InstanceGraphNode for a module.
Operation * getParent()
Return the parent under which all nodes are nested.
bool allUnder(ArrayRef< InstanceRecord * > nodes, InstanceGraphNode *top)
This file defines an intermediate representation for circuits acting as an abstraction for constraint...