CIRCT
19.0.0git
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Private Member Functions | |
FModuleOp | buildNewModule (OpBuilder &builder, Location location, Twine namehint, SmallVectorImpl< PortInfo > &ports) |
Safely build a new module with a given namehint. More... | |
InnerRefMap | runOnModuleLike (FModuleLike moduleLike) |
Strip layer colors from the module's interface. More... | |
void | runOnModuleBody (FModuleOp moduleOp, InnerRefMap &innerRefMap) |
Extract layerblocks and strip probe colors from all ops under the module. More... | |
void | removeLayersFromPorts (FModuleLike moduleLike) |
Update the module's port types to remove any explicit layer requirements from any probe types. More... | |
void | removeLayersFromValue (Value value) |
Update the value's type to remove any layers from any probe types. More... | |
void | removeLayersFromRefCast (RefCastOp cast) |
Remove any layers from the result of the cast. More... | |
void | maybeSetOutputDir (Operation *op) |
Set an output file attribute pointing at the testbench directory if a testbench directory is known to the pass. More... | |
void | setOutputFile (Operation *op, const Twine &filename) |
Set an output file attribute pointing at the provided filename. More... | |
void | runOnOperation () override |
Entry point for the function. More... | |
Private Attributes | |
llvm::sys::SmartMutex< true > * | circuitMutex |
Indicates exclusive access to modify the circuitNamespace and the circuit. More... | |
DenseMap< LayerBlockOp, StringRef > | moduleNames |
A map of layer blocks to module name that should be created for it. More... | |
FModuleOp | dut |
The design-under-test (DUT) as indicated by the presence of a "sifive.enterprise.firrtl.MarkDUTAnnotation". More... | |
StringRef | testBenchDir |
The directory for verification collateral as indicated by the presence of a "sifive.enterprise.firrtl.TestBenchDirAnnotation". More... | |
Definition at line 121 of file LowerLayers.cpp.
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Safely build a new module with a given namehint.
Multi-process safe function to build a module in the circuit and return it.
This handles geting a lock to modify the top-level circuit.
The name provided is only a namehint for the module—a unique name will be generated if there are conflicts with the namehint in the circuit-level namespace.
Definition at line 176 of file LowerLayers.cpp.
References builder, and circt::calyx::direction::get().
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Set an output file attribute pointing at the testbench directory if a testbench directory is known to the pass.
Set an output file attribute on the provided operation if the pass has a non-empty test bench directory.
Definition at line 609 of file LowerLayers.cpp.
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Update the module's port types to remove any explicit layer requirements from any probe types.
Definition at line 212 of file LowerLayers.cpp.
References circt::calyx::direction::get().
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Remove any layers from the result of the cast.
If the cast becomes a nop, remove the cast itself from the IR.
Definition at line 196 of file LowerLayers.cpp.
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Update the value's type to remove any layers from any probe types.
Definition at line 189 of file LowerLayers.cpp.
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Extract layerblocks and strip probe colors from all ops under the module.
Definition at line 264 of file LowerLayers.cpp.
References assert(), builder, Python.support::connect(), fileNameForLayer(), circt::calyx::direction::get(), circt::firrtl::getFieldName(), circt::firrtl::In, instanceNameForLayer(), isAncestor(), and circt::firrtl::Out.
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Strip layer colors from the module's interface.
Definition at line 240 of file LowerLayers.cpp.
References assert().
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Entry point for the function.
Process a circuit to remove all layer blocks in each module and top-level layer definition.
Definition at line 631 of file LowerLayers.cpp.
References assert(), builder, circt::firrtl::extractDUT(), circt::calyx::direction::get(), moduleNameForLayer(), circt::Namespace::newName(), circt::firrtl::testBenchDirAnnoClass, and circt::firrtl::transformReduce().
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Set an output file attribute pointing at the provided filename.
Prepend the testbench directory if one is known to the pass.
Definition at line 616 of file LowerLayers.cpp.
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Indicates exclusive access to modify the circuitNamespace and the circuit.
Definition at line 156 of file LowerLayers.cpp.
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The design-under-test (DUT) as indicated by the presence of a "sifive.enterprise.firrtl.MarkDUTAnnotation".
This will be null if no annotation is present.
Definition at line 164 of file LowerLayers.cpp.
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A map of layer blocks to module name that should be created for it.
Definition at line 159 of file LowerLayers.cpp.
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The directory for verification collateral as indicated by the presence of a "sifive.enterprise.firrtl.TestBenchDirAnnotation".
Empty if not specified.
Definition at line 169 of file LowerLayers.cpp.