19#include "mlir/IR/ImplicitLocOpBuilder.h"
20#include "llvm/ADT/SmallString.h"
21#include "llvm/ADT/TypeSwitch.h"
22#include "llvm/Support/Path.h"
25using namespace firrtl;
32 Value &cached =
cache[type];
34 cached = InvalidValueOp::create(
builder, type);
39 Value &cached =
cache[type];
41 cached =
builder.create<UnknownValueOp>(type);
51 ImplicitLocOpBuilder locBuilder(loc, builder.getInsertionBlock(),
52 builder.getInsertionPoint());
54 builder.restoreInsertionPoint(locBuilder.saveInsertionPoint());
57template <
typename ATy,
typename IndexOp,
bool isBundle >
61 auto dstAggTy = type_dyn_cast<ATy>(dstFType);
64 auto srcAggTy = type_dyn_cast<ATy>(srcFType);
73 ConnectOp::create(builder, dst, src);
78 auto dstField = IndexOp::create(builder, dst, i);
79 auto srcField = IndexOp::create(builder, src, i);
80 if constexpr (isBundle) {
81 if (dstAggTy.getElement(i).isFlip)
82 std::swap(dstField, srcField);
93 auto dstFType = type_cast<FIRRTLType>(dst.getType());
94 auto srcFType = type_cast<FIRRTLType>(src.getType());
95 auto dstType = type_dyn_cast<FIRRTLBaseType>(dstFType);
96 auto srcType = type_dyn_cast<FIRRTLBaseType>(srcFType);
100 if (type_isa<RefType>(dstFType)) {
101 if (dstFType != srcFType)
102 src = RefCastOp::create(builder, dstFType, src);
103 RefDefineOp::create(builder, dst, src);
104 }
else if (type_isa<PropertyType>(dstFType) &&
105 type_isa<PropertyType>(srcFType)) {
107 PropAssignOp::create(builder, dst, src);
108 }
else if (type_isa<DomainType>(dstFType) &&
109 type_isa<DomainType>(srcFType)) {
110 DomainDefineOp::create(builder, dst, src);
111 }
else if (failed(connectIfAggregates<OpenBundleType, OpenSubfieldOp, true>(
112 builder, dst, dstFType, src, srcFType)) &&
114 connectIfAggregates<OpenVectorType, OpenSubindexOp, false>(
115 builder, dst, dstFType, src, srcFType))) {
117 ConnectOp::create(builder, dst, src);
123 if (isa<AnalogType>(dstType)) {
124 AttachOp::create(builder, ArrayRef{dst, src});
129 if (dstType == srcType && dstType.isPassive() &&
130 !dstType.hasUninferredWidth() && !dstType.containsAnalog()) {
131 MatchingConnectOp::create(builder, dst, src);
135 if (succeeded(connectIfAggregates<BundleType, SubfieldOp, true>(
136 builder, dst, dstFType, src, srcFType)) ||
137 succeeded(connectIfAggregates<FVectorType, SubindexOp, false>(
138 builder, dst, dstFType, src, srcFType)))
141 if ((dstType.hasUninferredReset() || srcType.hasUninferredReset()) &&
142 dstType != srcType) {
143 srcType = dstType.getConstType(srcType.isConst());
144 src = UninferredResetCastOp::create(builder, srcType, src);
148 auto dstWidth = dstType.getBitWidthOrSentinel();
149 auto srcWidth = srcType.getBitWidthOrSentinel();
150 if (dstWidth < 0 || srcWidth < 0) {
157 if (dstType != srcType && dstType.getWidthlessType() != srcType &&
159 src = ConstCastOp::create(builder, dstType.getWidthlessType(), src);
162 ConnectOp::create(builder, dst, src);
167 if (dstWidth < srcWidth) {
170 type_cast<IntType>(dstType).
getConstType(srcType.isConst());
171 bool isSignedDest = tmpType.
isSigned();
174 UIntType::get(dstType.getContext(), dstWidth, srcType.isConst());
175 src = TailPrimOp::create(builder, tmpType, src, srcWidth - dstWidth);
178 src = AsSIntPrimOp::create(builder,
179 dstType.getConstType(tmpType.
isConst()), src);
180 }
else if (srcWidth < dstWidth) {
182 src = PadPrimOp::create(builder, src, dstWidth);
185 if (
auto srcType = type_cast<FIRRTLBaseType>(src.getType());
186 srcType && dstType != srcType &&
188 src = ConstCastOp::create(builder, dstType, src);
193 if (dstType == src.getType() && dstType.isPassive() &&
194 !dstType.hasUninferredWidth()) {
195 MatchingConnectOp::create(builder, dst, src);
197 ConnectOp::create(builder, dst, src);
201 auto intType = type_cast<IntType>(type);
202 assert((!intType.hasWidth() ||
203 (
unsigned)intType.getWidthOrSentinel() == value.getBitWidth()) &&
204 "value / type width mismatch");
206 intType.isSigned() ? IntegerType::Signed : IntegerType::Unsigned;
208 IntegerType::get(type.getContext(), value.getBitWidth(), intSign);
209 return IntegerAttr::get(attrType, value);
215 int32_t width = abs(type_cast<IntType>(type).getWidthOrSentinel());
222 int32_t width = abs(type_cast<IntType>(type).getWidthOrSentinel());
224 type, APInt(width, -1,
false,
true));
230 for (
auto *user : value.getUsers())
231 if (
auto propassign = dyn_cast<PropAssignOp>(user))
232 if (propassign.getDest() == value)
247 for (
auto *user : val.getUsers()) {
248 if (
auto connect = dyn_cast<FConnectLike>(user)) {
249 if (connect.getDest() != val)
251 return connect.getSrc();
258 bool lookThroughNodes,
259 bool lookThroughCasts) {
264 auto updateVal = [&](Value thisVal) {
265 for (
auto *user : thisVal.getUsers()) {
266 if (
auto connect = dyn_cast<FConnectLike>(user)) {
267 if (connect.getDest() != val)
269 val = connect.getSrc();
279 if (
auto blockArg = dyn_cast<BlockArgument>(val)) {
280 FModuleOp op = cast<FModuleOp>(val.getParentBlock()->getParentOp());
281 auto direction = op.getPortDirection(blockArg.getArgNumber());
289 auto *op = val.getDefiningOp();
292 if (
auto inst = dyn_cast<InstanceOp>(op)) {
293 auto resultNo = cast<OpResult>(val).getResultNumber();
296 return inst.getResult(resultNo);
303 updateVal(op->getResult(0));
308 if (lookThroughNodes && isa<NodeOp>(op)) {
309 val = cast<NodeOp>(op).getInput();
313 if (lookThroughCasts &&
314 isa<AsUIntPrimOp, AsSIntPrimOp, AsClockPrimOp, AsAsyncResetPrimOp>(
316 val = op->getOperand(0);
321 if (isa<PadPrimOp, TailPrimOp>(op)) {
322 val = op->getOperand(0);
337 bool lookThroughNodes,
bool lookThroughCasts,
341 assert(value.getType().isPassive() &&
"this code was not tested with flips");
352 struct StackElement {
354 : dst(dst), src(src), current(current), it(current.user_begin()),
367 Value::user_iterator it;
371 SmallVector<StackElement> workStack;
377 auto value = src.getValue();
378 workStack.emplace_back(dst, src, value, src.
getFieldID());
384 auto fieldRef = original;
392 auto val = fieldRef.getValue();
395 if (
auto blockArg = dyn_cast<BlockArgument>(val)) {
396 auto *parent = val.getParentBlock()->getParentOp();
397 auto module = cast<FModuleLike>(parent);
398 auto direction =
module.getPortDirection(blockArg.getArgNumber());
401 if (!callback(original, fieldRef))
405 addToWorklist(original, fieldRef);
409 auto *op = val.getDefiningOp();
412 if (
auto inst = dyn_cast<InstanceOp>(op)) {
413 auto resultNo = cast<OpResult>(val).getResultNumber();
416 if (!callback(original, fieldRef))
420 addToWorklist(original, fieldRef);
426 addToWorklist(original, fieldRef);
431 if (lookThroughNodes && isa<NodeOp>(op)) {
432 auto input = cast<NodeOp>(op).getInput();
434 fieldRef = next.getSubField(fieldRef.getFieldID());
439 if (lookThroughCasts &&
440 isa<AsUIntPrimOp, AsSIntPrimOp, AsClockPrimOp, AsAsyncResetPrimOp>(
442 auto input = op->getOperand(0);
444 fieldRef = next.getSubField(fieldRef.getFieldID());
449 if (isa<PadPrimOp, TailPrimOp>(op)) {
450 auto input = op->getOperand(0);
452 fieldRef = next.getSubField(fieldRef.getFieldID());
461 if (!callback(original, fieldRef))
469 if (workStack.empty())
471 auto &back = workStack.back();
472 auto current = back.current;
474 if (back.it == current.user_end()) {
475 workStack.pop_back();
481 auto *user = *back.it++;
482 auto fieldID = back.fieldID;
484 if (
auto subfield = dyn_cast<SubfieldOp>(user)) {
485 BundleType bundleType = subfield.getInput().getType();
486 auto index = subfield.getFieldIndex();
487 auto subID = bundleType.getFieldID(index);
489 if (fieldID && index != bundleType.getIndexForFieldID(fieldID))
491 auto subRef = fieldRef.getSubField(subID);
492 auto subOriginal = original.getSubField(subID);
493 auto value = subfield.getResult();
496 workStack.emplace_back(subOriginal, subRef, value, 0);
499 workStack.emplace_back(subOriginal, subRef, value, fieldID - subID);
501 }
else if (
auto subindex = dyn_cast<SubindexOp>(user)) {
502 FVectorType vectorType = subindex.getInput().getType();
503 auto index = subindex.getIndex();
504 auto subID = vectorType.getFieldID(index);
506 if (fieldID && index != vectorType.getIndexForFieldID(fieldID))
508 auto subRef = fieldRef.getSubField(subID);
509 auto subOriginal = original.getSubField(subID);
510 auto value = subindex.getResult();
513 workStack.emplace_back(subOriginal, subRef, value, 0);
516 workStack.emplace_back(subOriginal, subRef, value, fieldID - subID);
518 }
else if (
auto connect = dyn_cast<FConnectLike>(user)) {
520 if (connect.getDest() != current)
538 if (LLVM_UNLIKELY(!value))
542 auto *op = value.getDefiningOp();
549 return TypeSwitch<Operation *, FieldRef>(op)
550 .Case<RefCastOp, ConstCastOp, UninferredResetCastOp>(
551 [lookThroughCasts](
auto op) {
552 if (!lookThroughCasts)
556 .Case<SubfieldOp, OpenSubfieldOp, SubindexOp, OpenSubindexOp, RefSubOp,
558 [](
auto subOp) {
return subOp.getAccessedField(); })
563 bool lookThroughCasts) {
564 if (LLVM_UNLIKELY(!value))
570 auto deltaRef =
getDeltaRef(value, lookThroughCasts);
574 id = deltaRef.getSubField(
id).getFieldID();
576 value = deltaRef.getValue();
581static void getDeclName(Value value, SmallString<64> &
string,
bool nameSafe) {
584 if (
auto arg = dyn_cast<BlockArgument>(value)) {
586 auto *op = arg.getOwner()->getParentOp();
587 TypeSwitch<Operation *>(op).Case<FModuleOp, ClassOp>([&](
auto op) {
588 auto name = cast<StringAttr>(op.getPortNames()[arg.getArgNumber()]);
589 string += name.getValue();
594 auto *op = value.getDefiningOp();
595 TypeSwitch<Operation *>(op)
596 .Case<ObjectOp>([&](ObjectOp op) {
597 string += op.getInstanceName();
600 .Case<InstanceOp, InstanceChoiceOp, MemOp>([&](
auto op) {
601 string += op.getName();
602 string += nameSafe ?
"_" :
".";
603 string += op.getPortName(cast<OpResult>(value).getResultNumber());
606 .Case<FNamableOp>([&](
auto op) {
607 string += op.getName();
610 .Case<mlir::UnrealizedConversionCastOp>(
611 [&](mlir::UnrealizedConversionCastOp cast) {
613 if (cast.getNumResults() == 1 && cast.getNumOperands() == 1 &&
614 cast.getResult(0).getType() == cast.getOperand(0).getType()) {
615 value = cast.getInputs()[0];
630std::pair<std::string, bool>
632 SmallString<64> name;
635 bool rootKnown = !name.empty();
637 auto type = value.getType();
641 if (
auto refTy = type_dyn_cast<RefType>(type))
642 type = refTy.getType();
644 if (
auto bundleType = type_dyn_cast<BundleType>(type)) {
645 auto index = bundleType.getIndexForFieldID(localID);
647 auto &element = bundleType.getElements()[index];
649 name += nameSafe ?
"_" :
".";
650 name += element.name.getValue();
653 localID = localID - bundleType.getFieldID(index);
654 }
else if (
auto bundleType = type_dyn_cast<OpenBundleType>(type)) {
655 auto index = bundleType.getIndexForFieldID(localID);
657 auto &element = bundleType.getElements()[index];
659 name += nameSafe ?
"_" :
".";
660 name += element.name.getValue();
663 localID = localID - bundleType.getFieldID(index);
664 }
else if (
auto vecType = type_dyn_cast<FVectorType>(type)) {
665 auto index = vecType.getIndexForFieldID(localID);
666 name += nameSafe ?
"_" :
"[";
667 name += std::to_string(index);
671 type = vecType.getElementType();
672 localID = localID - vecType.getFieldID(index);
673 }
else if (
auto vecType = type_dyn_cast<OpenVectorType>(type)) {
674 auto index = vecType.getIndexForFieldID(localID);
675 name += nameSafe ?
"_" :
"[";
676 name += std::to_string(index);
680 type = vecType.getElementType();
681 localID = localID - vecType.getFieldID(index);
682 }
else if (
auto classType = type_dyn_cast<ClassType>(type)) {
683 auto index = classType.getIndexForFieldID(localID);
684 auto &element = classType.getElement(index);
685 name += nameSafe ?
"_" :
".";
686 name += element.name.getValue();
688 localID = localID - classType.getFieldID(index);
694 llvm_unreachable(
"unsupported type");
698 return {name.str().str(), rootKnown};
706 Value value,
unsigned fieldID) {
708 while (fieldID != 0) {
710 .
Case<BundleType>([&](
auto bundle) {
711 auto index = bundle.getIndexForFieldID(fieldID);
712 value = SubfieldOp::create(builder, value, index);
713 fieldID -= bundle.getFieldID(index);
715 .Case<OpenBundleType>([&](
auto bundle) {
716 auto index = bundle.getIndexForFieldID(fieldID);
717 value = OpenSubfieldOp::create(builder, value, index);
718 fieldID -= bundle.getFieldID(index);
720 .Case<FVectorType>([&](
auto vector) {
721 auto index = vector.getIndexForFieldID(fieldID);
722 value = SubindexOp::create(builder, value, index);
723 fieldID -= vector.getFieldID(index);
725 .Case<OpenVectorType>([&](
auto vector) {
726 auto index = vector.getIndexForFieldID(fieldID);
727 value = OpenSubindexOp::create(builder, value, index);
728 fieldID -= vector.getFieldID(index);
730 .Case<RefType>([&](
auto reftype) {
732 .template Case<BundleType, FVectorType>([&](
auto type) {
733 auto index = type.getIndexForFieldID(fieldID);
734 value = RefSubOp::create(builder, value, index);
735 fieldID -= type.getFieldID(index);
737 .Default([&](
auto _) {
738 llvm::report_fatal_error(
739 "unrecognized type for indexing through with fieldID");
743 .Default([&](
auto _) {
744 llvm::report_fatal_error(
745 "unrecognized type for indexing through with fieldID");
765 return fn(0, type,
false);
767 uint64_t fieldID = 0;
768 auto recurse = [&](
auto &&f,
FIRRTLBaseType type,
bool isFlip) ->
void {
770 .
Case<BundleType>([&](BundleType bundle) {
771 for (
size_t i = 0, e = bundle.getNumElements(); i < e; ++i) {
773 f(f, bundle.getElementType(i),
774 isFlip ^ bundle.getElement(i).isFlip);
777 .
template Case<FVectorType>([&](FVectorType vector) {
778 for (
size_t i = 0, e = vector.getNumElements(); i < e; ++i) {
780 f(f, vector.getElementType(), isFlip);
783 .
template Case<FEnumType>([&](FEnumType fenum) {
787 fn(fieldID, fenum, isFlip);
790 assert(groundType.isGround() &&
791 "only ground types are expected here");
792 fn(fieldID, groundType, isFlip);
795 recurse(recurse, type,
false);
802 if (
auto arg = dyn_cast<BlockArgument>(root)) {
803 auto mod = cast<FModuleLike>(arg.getOwner()->getParentOp());
814 return TypeSwitch<Operation *, FieldRef>(ist.
getOp())
815 .Case<FModuleOp>([&](
auto fmod) {
821 auto symOp = dyn_cast<hw::InnerSymbolOpInterface>(ist.
getOp());
822 assert(symOp && symOp.getTargetResultIndex() &&
823 (symOp.supportsPerFieldSymbols() || ist.
getField() == 0));
829 MLIRContext *
context, hw::InnerSymAttr attr, uint64_t fieldID,
831 SmallVector<hw::InnerSymPropertiesAttr> props;
834 if (
auto sym = attr.getSymIfExists(fieldID))
836 llvm::append_range(props, attr.getProps());
840 auto sym = StringAttr::get(
context, getNamespace().newName(
"sym"));
841 props.push_back(hw::InnerSymPropertiesAttr::get(
846 [](
auto &p,
auto &q) {
return p.getFieldID() < q.getFieldID(); });
847 return {hw::InnerSymAttr::get(
context, props), sym};
854 if (
auto mod = dyn_cast<FModuleLike>(target.
getOp())) {
855 auto portIdx = target.
getPort();
856 assert(portIdx < mod.getNumPorts());
860 mod.setPortSymbolAttr(portIdx, attr);
865 if (
auto symOp = dyn_cast<hw::InnerSymbolOpInterface>(target.
getOp())) {
869 symOp.setInnerSymbolAttr(attr);
874 assert(0 &&
"target must be port of FModuleLike or InnerSymbol");
882 module = cast<FModuleLike>(target.getOp());
884 module = target.getOp()->getParentOfType<FModuleOp>();
888 return getNamespace(module);
897 auto mod = target.
isPort() ? dyn_cast<FModuleLike>(target.
getOp())
898 : target.
getOp()->getParentOfType<FModuleOp>();
900 "must be an operation inside an FModuleOp or port of FModuleLike");
901 return hw::InnerRefAttr::get(SymbolTable::getSymbolName(mod),
906std::pair<bool, std::optional<mlir::LocationAttr>>
908 StringAttr &locatorFilenameCache,
909 FileLineColLoc &fileLineColLocCache,
912 if (!spelling.starts_with(
"@[") || !spelling.ends_with(
"]"))
913 return {
false, std::nullopt};
915 spelling = spelling.drop_front(2).drop_back(1);
919 auto decodeLocator = [&](StringRef input,
unsigned &resultLineNo,
920 unsigned &resultColNo) -> StringRef {
922 auto spaceLoc = input.find_last_of(
' ');
923 if (spaceLoc == StringRef::npos)
926 auto filename = input.take_front(spaceLoc);
927 auto lineAndColumn = input.drop_front(spaceLoc + 1);
931 StringRef lineStr, colStr;
932 std::tie(lineStr, colStr) = lineAndColumn.split(
':');
935 if (lineStr.getAsInteger(10, resultLineNo))
937 if (!colStr.empty()) {
938 if (colStr.front() !=
'{') {
939 if (colStr.getAsInteger(10, resultColNo))
943 if (colStr.drop_front().split(
',').first.getAsInteger(10, resultColNo))
951 unsigned lineNo = 0, columnNo = 0;
952 StringRef filename = decodeLocator(spelling, lineNo, columnNo);
953 if (filename.empty())
954 return {
false, std::nullopt};
959 return {
true, std::nullopt};
963 auto getFileLineColLoc = [&](StringRef filename,
unsigned lineNo,
964 unsigned columnNo) -> FileLineColLoc {
966 StringAttr filenameId = locatorFilenameCache;
967 if (filenameId.str() != filename) {
969 locatorFilenameCache = filenameId = StringAttr::get(
context, filename);
973 return fileLineColLocCache =
974 FileLineColLoc::get(filenameId, lineNo, columnNo);
978 auto result = fileLineColLocCache;
979 if (result && result.getLine() == lineNo && result.getColumn() == columnNo)
982 return fileLineColLocCache =
983 FileLineColLoc::get(filenameId, lineNo, columnNo);
994 SmallVector<Location> extraLocs;
995 auto spaceLoc = filename.find_last_of(
' ');
996 while (spaceLoc != StringRef::npos) {
999 unsigned nextLineNo = 0, nextColumnNo = 0;
1001 decodeLocator(filename.take_front(spaceLoc), nextLineNo, nextColumnNo);
1004 if (nextFilename.empty())
1010 getFileLineColLoc(filename.drop_front(spaceLoc + 1), lineNo, columnNo);
1011 extraLocs.push_back(loc);
1012 filename = nextFilename;
1013 lineNo = nextLineNo;
1014 columnNo = nextColumnNo;
1015 spaceLoc = filename.find_last_of(
' ');
1018 mlir::LocationAttr result = getFileLineColLoc(filename, lineNo, columnNo);
1019 if (!extraLocs.empty()) {
1020 extraLocs.push_back(result);
1021 std::reverse(extraLocs.begin(), extraLocs.end());
1022 result = FusedLoc::get(
context, extraLocs);
1024 return {
true, result};
1031 Type type, std::optional<Location> loc,
1032 llvm::function_ref<hw::TypeAliasType(Type, BaseTypeAliasType, Location)>
1034 auto firType = type_dyn_cast<FIRRTLBaseType>(type);
1040 if (BaseTypeAliasType aliasType = dyn_cast<BaseTypeAliasType>(firType)) {
1042 loc = UnknownLoc::get(type.getContext());
1043 type =
lowerType(aliasType.getInnerType(), loc, getTypeDeclFn);
1044 return getTypeDeclFn(type, aliasType, *loc);
1047 firType = firType.getPassiveType();
1049 if (
auto bundle = type_dyn_cast<BundleType>(firType)) {
1050 mlir::SmallVector<hw::StructType::FieldInfo, 8> hwfields;
1051 for (
auto element : bundle) {
1052 Type etype =
lowerType(element.type, loc, getTypeDeclFn);
1055 hwfields.push_back(hw::StructType::FieldInfo{element.name, etype});
1057 return hw::StructType::get(type.getContext(), hwfields);
1059 if (
auto vec = type_dyn_cast<FVectorType>(firType)) {
1060 auto elemTy =
lowerType(vec.getElementType(), loc, getTypeDeclFn);
1063 return hw::ArrayType::get(elemTy, vec.getNumElements());
1065 if (
auto fenum = type_dyn_cast<FEnumType>(firType)) {
1066 mlir::SmallVector<hw::UnionType::FieldInfo, 8> hwfields;
1068 for (
auto element : fenum) {
1069 Type etype =
lowerType(element.type, loc, getTypeDeclFn);
1072 hwfields.push_back(hw::UnionType::FieldInfo{element.name, etype, 0});
1073 if (element.type.getBitWidthOrSentinel() != 0)
1076 auto tagTy = IntegerType::get(type.getContext(), fenum.getTagWidth());
1079 auto bodyTy = hw::UnionType::get(type.getContext(), hwfields);
1080 hw::StructType::FieldInfo fields[2] = {
1081 {StringAttr::get(type.getContext(),
"tag"), tagTy},
1082 {StringAttr::get(type.getContext(),
"body"), bodyTy}};
1083 return hw::StructType::get(type.getContext(), fields);
1085 if (type_isa<ClockType>(firType))
1086 return seq::ClockType::get(firType.getContext());
1088 auto width = firType.getBitWidthOrSentinel();
1090 return IntegerType::get(type.getContext(), width);
1098 size_t e = std::min(a.size(), b.size());
1105 auto sep = llvm::sys::path::get_separator();
1106 while (!a.empty() && !a.ends_with(sep))
1111 mlir::ImplicitLocOpBuilder &builderOM) {
1113 auto *
context = op->getContext();
1114 auto id = DistinctAttr::create(UnitAttr::get(
context));
1115 TargetKind kind = TargetKind::Reference;
1118 NamedAttrList fields;
1119 fields.append(
"id",
id);
1120 fields.append(
"class", StringAttr::get(
context,
"circt.tracker"));
1122 fields.append(
"circt.nonlocal", mlir::FlatSymbolRefAttr::get(nla));
1126 if (isa<InstanceOp, FModuleLike>(op))
1127 kind = TargetKind::Instance;
1131 return PathOp::create(builderOM, kind,
id);
1140 llvm::StringRef formatString,
1141 llvm::ArrayRef<mlir::Value> specOperands,
1142 mlir::StringAttr &formatStringResult,
1143 llvm::SmallVectorImpl<mlir::Value> &operands) {
1146 llvm::SmallString<64> validatedFormatString;
1148 for (
size_t i = 0, e = formatString.size(), opIdx = 0; i != e; ++i) {
1149 auto c = formatString[i];
1154 validatedFormatString.push_back(c);
1157 llvm::SmallString<6> width;
1158 c = formatString[++i];
1161 c = formatString[++i];
1168 return mlir::emitError(loc) <<
"ASCII character format specifiers "
1169 "('%c') may not specify a width";
1175 validatedFormatString.append(width);
1176 if (specOperands.size() <= opIdx)
1177 return mlir::emitError(loc) <<
"not enough operands for format "
1179 operands.push_back(specOperands[opIdx++]);
1183 return mlir::emitError(loc)
1184 <<
"literal percents ('%%') may not specify a width";
1188 return mlir::emitError(loc)
1189 <<
"unknown printf substitution '%" << width << c <<
"'";
1191 validatedFormatString.push_back(c);
1199 if (formatString[i + 1] !=
'{') {
1200 validatedFormatString.push_back(c);
1206 while (formatString[i] !=
'}')
1208 if (formatString[i] !=
'}')
1209 return mlir::emitError(loc)
1210 <<
"expected '}' to terminate special substitution";
1212 auto specialString = formatString.slice(start, i);
1213 if (specialString ==
"SimulationTime") {
1214 operands.push_back(TimeOp::create(builder, loc));
1215 }
else if (specialString ==
"HierarchicalModuleName") {
1216 operands.push_back(HierarchicalModuleNameOp::create(builder, loc));
1218 return mlir::emitError(loc)
1219 <<
"unknown printf substitution '" << specialString
1220 <<
"' (did you misspell it?)";
1223 validatedFormatString.append(
"{{}}");
1228 validatedFormatString.push_back(c);
1232 formatStringResult = builder.getStringAttr(validatedFormatString);
1233 return mlir::success();
1241 Operation *operation) {
1242 if (
auto mod = dyn_cast<mlir::ModuleOp>(operation))
1243 for (
auto &op : *mod.getBody())
1244 if ((operation = dyn_cast<CircuitOp>(&op)))
1247 for (
auto option : cast<CircuitOp>(operation).getOps<OptionOp>())
1248 for (
auto optionCase : option.getOps<OptionCaseOp>())
1249 cache[{option.getSymNameAttr(), optionCase.getSymNameAttr()}] =
1250 optionCase.getCaseMacroAttr();
1255 StringAttr caseName)
const {
1256 auto it = cache.find({optionName, caseName});
1257 if (it == cache.end())
assert(baseType &&"element must be base type")
MlirType uint64_t numElements
static std::unique_ptr< Context > context
static LogicalResult connectIfAggregates(ImplicitLocOpBuilder &builder, Value dst, FIRRTLType dstFType, Value src, FIRRTLType srcFType)
static void getDeclName(Value value, SmallString< 64 > &string, bool nameSafe)
Get the string name of a value which is a direct child of a declaration op.
static Value lookThroughWires(Value value)
Trace a value through wires to its original definition.
This class represents a reference to a specific field or element of an aggregate value.
unsigned getFieldID() const
Get the field ID of this FieldRef, which is a unique identifier mapped to a specific field in a bundl...
Value getValue() const
Get the Value which created this location.
This class provides a read-only projection over the MLIR attributes that represent a set of annotatio...
bool applyToOperation(Operation *op) const
Store the annotations in this set in an operation's annotations attribute, overwriting any existing a...
void addAnnotations(ArrayRef< Annotation > annotations)
Add more annotations to this annotation set.
bool isConst() const
Returns true if this is a 'const' type that can only hold compile-time constant values.
This class implements the same functionality as TypeSwitch except that it uses firrtl::type_dyn_cast ...
FIRRTLTypeSwitch< T, ResultT > & Case(CallableT &&caseFn)
Add a case on the given type.
FlatSymbolRefAttr getMacro(StringAttr optionName, StringAttr caseName) const
InstanceChoiceMacroTable(Operation *op)
This is the common base class between SIntType and UIntType.
IntType getConstType(bool isConst) const
Return a 'const' or non-'const' version of this type.
ImplicitLocOpBuilder & builder
Value getInvalid(FIRRTLBaseType type)
Get or create an InvalidValueOp for the given base type.
SmallDenseMap< Type, Value, 8 > cache
Value getUnknown(PropertyType type)
Get or create an UnknownValueOp for the given property type.
The target of an inner symbol, the entity the symbol is a handle for.
auto getField() const
Return the target's fieldID.
auto getPort() const
Return the target's port, if valid. Check "isPort()".
bool isPort() const
Return if this targets a port.
Operation * getOp() const
Return the target's base operation. For ports, this is the module.
llvm::function_ref< hw::InnerSymbolNamespace &(FModuleLike mod)> GetNamespaceCallback
FieldRef getFieldRefForTarget(const hw::InnerSymTarget &ist)
Get FieldRef pointing to the specified inner symbol target, which must be valid.
FieldRef getDeltaRef(Value value, bool lookThroughCasts=false)
Get the delta indexing from a value, as a FieldRef.
FIRRTLBaseType getBaseType(Type type)
If it is a base type, return it as is.
FieldRef getFieldRefFromValue(Value value, bool lookThroughCasts=false)
Get the FieldRef from a value.
mlir::TypedValue< FIRRTLBaseType > FIRRTLBaseValue
void walkGroundTypes(FIRRTLType firrtlType, llvm::function_ref< void(uint64_t, FIRRTLBaseType, bool)> fn)
Walk leaf ground types in the firrtlType and apply the function fn.
PathOp createPathRef(Operation *op, hw::HierPathOp nla, mlir::ImplicitLocOpBuilder &builderOM)
Add the tracker annotation to the op and get a PathOp to the op.
IntegerAttr getIntAttr(Type type, const APInt &value)
Utiility for generating a constant attribute.
std::pair< bool, std::optional< mlir::LocationAttr > > maybeStringToLocation(llvm::StringRef spelling, bool skipParsing, mlir::StringAttr &locatorFilenameCache, FileLineColLoc &fileLineColLocCache, MLIRContext *context)
std::pair< hw::InnerSymAttr, StringAttr > getOrAddInnerSym(MLIRContext *context, hw::InnerSymAttr attr, uint64_t fieldID, llvm::function_ref< hw::InnerSymbolNamespace &()> getNamespace)
Ensure that the the InnerSymAttr has a symbol on the field specified.
hw::InnerRefAttr getInnerRefTo(const hw::InnerSymTarget &target, GetNamespaceCallback getNamespace)
Obtain an inner reference to the target (operation or port), adding an inner symbol as necessary.
PropAssignOp getPropertyAssignment(FIRRTLPropertyValue value)
Return the single assignment to a Property value.
mlir::ParseResult parseFormatString(mlir::OpBuilder &builder, mlir::Location loc, llvm::StringRef formatString, llvm::ArrayRef< mlir::Value > specOperands, mlir::StringAttr &formatStringResult, llvm::SmallVectorImpl< mlir::Value > &operands)
Value getModuleScopedDriver(Value val, bool lookThroughWires, bool lookThroughNodes, bool lookThroughCasts)
Return the value that drives another FIRRTL value within module scope.
Value getDriverFromConnect(Value val)
Return the module-scoped driver of a value only looking through one connect.
Value getValueByFieldID(ImplicitLocOpBuilder builder, Value value, unsigned fieldID)
This gets the value targeted by a field id.
std::pair< std::string, bool > getFieldName(const FieldRef &fieldRef, bool nameSafe=false)
Get a string identifier representing the FieldRef.
llvm::function_ref< bool(const FieldRef &dst, const FieldRef &src)> WalkDriverCallback
Walk all the drivers of a value, passing in the connect operations drive the value.
mlir::TypedValue< PropertyType > FIRRTLPropertyValue
Type lowerType(Type type, std::optional< Location > loc={}, llvm::function_ref< hw::TypeAliasType(Type, BaseTypeAliasType, Location)> getTypeDeclFn={})
Given a type, return the corresponding lowered type for the HW dialect.
hw::InnerSymTarget getTargetFor(FieldRef ref)
Return the inner sym target for the specified value and fieldID.
bool areTypesConstCastable(FIRRTLType destType, FIRRTLType srcType, bool srcOuterTypeIsConst=false)
Returns whether the srcType can be const-casted to the destType.
bool walkDrivers(FIRRTLBaseValue value, bool lookThroughWires, bool lookThroughNodes, bool lookThroughCasts, WalkDriverCallback callback)
IntegerAttr getIntOnesAttr(Type type)
Utility for generating a constant all ones attribute.
void emitConnect(OpBuilder &builder, Location loc, Value lhs, Value rhs)
Emit a connect between two values.
void makeCommonPrefix(SmallString< 64 > &a, StringRef b)
Truncate a to the common prefix of a and b.
IntegerAttr getIntZerosAttr(Type type)
Utility for generating a constant zero attribute.
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.