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LogicalResult | matchAndRewrite (CellInterface cell, ArrayRef< Value > operands, ConversionPatternRewriter &rewriter) const override |
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void | convertPrimitiveOp (Operation *op, SmallVectorImpl< Value > &wires, ImplicitLocOpBuilder &b) const |
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template<typename OpTy , typename ResultTy > |
void | convertArithBinaryOp (OpTy op, SmallVectorImpl< Value > &wires, ImplicitLocOpBuilder &b) const |
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template<typename OpTy > |
void | convertCompareBinaryOp (OpTy op, ICmpPredicate pred, SmallVectorImpl< Value > &wires, ImplicitLocOpBuilder &b) const |
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template<typename SrcOpTy , typename TargetOpTy > |
void | convertPipelineOp (SrcOpTy op, SmallVectorImpl< Value > &wires, ImplicitLocOpBuilder &b) const |
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ReadInOutOp | wireIn (Value source, StringRef instanceName, StringRef portName, ImplicitLocOpBuilder &b) const |
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ReadInOutOp | wireOut (Value source, StringRef instanceName, StringRef portName, ImplicitLocOpBuilder &b) const |
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CompRegOp | reg (Value source, Value clock, Value reset, const Twine &name, ImplicitLocOpBuilder &b) const |
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CompRegClockEnabledOp | regCe (Value source, Value clock, Value ce, Value reset, const Twine &name, ImplicitLocOpBuilder &b) const |
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std::string | createName (StringRef instanceName, StringRef portName) const |
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Definition at line 162 of file CalyxToHW.cpp.
◆ convertArithBinaryOp()
template<typename OpTy , typename ResultTy >
void ConvertCellOp::convertArithBinaryOp |
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OpTy |
op, |
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SmallVectorImpl< Value > & |
wires, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
◆ convertCompareBinaryOp()
template<typename OpTy >
void ConvertCellOp::convertCompareBinaryOp |
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OpTy |
op, |
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ICmpPredicate |
pred, |
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SmallVectorImpl< Value > & |
wires, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
◆ convertPipelineOp()
template<typename SrcOpTy , typename TargetOpTy >
void ConvertCellOp::convertPipelineOp |
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SrcOpTy |
op, |
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SmallVectorImpl< Value > & |
wires, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
◆ convertPrimitiveOp()
void ConvertCellOp::convertPrimitiveOp |
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Operation * |
op, |
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SmallVectorImpl< Value > & |
wires, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
◆ createName()
std::string ConvertCellOp::createName |
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StringRef |
instanceName, |
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StringRef |
portName |
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) |
| const |
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inlineprivate |
◆ matchAndRewrite()
LogicalResult ConvertCellOp::matchAndRewrite |
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CellInterface |
cell, |
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ArrayRef< Value > |
operands, |
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ConversionPatternRewriter & |
rewriter |
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) |
| const |
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inlineoverride |
◆ reg()
CompRegOp ConvertCellOp::reg |
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Value |
source, |
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Value |
clock, |
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Value |
reset, |
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const Twine & |
name, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
◆ regCe()
CompRegClockEnabledOp ConvertCellOp::regCe |
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Value |
source, |
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Value |
clock, |
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Value |
ce, |
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Value |
reset, |
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const Twine & |
name, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
◆ wireIn()
ReadInOutOp ConvertCellOp::wireIn |
( |
Value |
source, |
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StringRef |
instanceName, |
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StringRef |
portName, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
◆ wireOut()
ReadInOutOp ConvertCellOp::wireOut |
( |
Value |
source, |
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StringRef |
instanceName, |
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StringRef |
portName, |
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ImplicitLocOpBuilder & |
b |
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) |
| const |
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inlineprivate |
The documentation for this struct was generated from the following file:
- /home/runner/work/circt-www/circt-www/circt_src/lib/Conversion/CalyxToHW/CalyxToHW.cpp