CIRCT  18.0.0git
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1 //===- ExportVerilog.cpp - C Interface to ExportVerilog -------------------===//
2 //
3 // Implements a C Interface for export Verilog.
4 //
5 //===----------------------------------------------------------------------===//
10 #include "mlir/CAPI/IR.h"
11 #include "mlir/CAPI/Support.h"
12 #include "mlir/CAPI/Utils.h"
13 #include "llvm/Support/raw_ostream.h"
15 using namespace circt;
17 MlirLogicalResult mlirExportVerilog(MlirModule module,
18  MlirStringCallback callback,
19  void *userData) {
20  mlir::detail::CallbackOstream stream(callback, userData);
21  return wrap(exportVerilog(unwrap(module), stream));
22 }
24 MlirLogicalResult mlirExportSplitVerilog(MlirModule module,
25  MlirStringRef directory) {
26  return wrap(exportSplitVerilog(unwrap(module), unwrap(directory)));
27 }
MlirLogicalResult mlirExportSplitVerilog(MlirModule module, MlirStringRef directory)
Emits split Verilog files for the specified module into the given directory.
MlirLogicalResult mlirExportVerilog(MlirModule module, MlirStringCallback callback, void *userData)
Emits verilog for the specified module using the provided callback and user data.
return wrap(CMemoryType::get(unwrap(ctx), baseType, numElements))
static EvaluatorValuePtr unwrap(OMEvaluatorValue c)
Definition: OM.cpp:78
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
mlir::LogicalResult exportVerilog(mlir::ModuleOp module, llvm::raw_ostream &os)
Export a module containing HW, and SV dialect code.
mlir::LogicalResult exportSplitVerilog(mlir::ModuleOp module, llvm::StringRef dirname)
Export a module containing HW, and SV dialect code, as one file per SV module.