CIRCT  20.0.0git
PassDetails.h
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1 //===- PassDetails.h - ESI pass class details -----------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Stuff shared between the different ESI passes.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 // clang-tidy seems to expect the absolute path in the header guard on some
14 // systems, so just disable it.
15 // NOLINTNEXTLINE(llvm-header-guard)
16 #ifndef DIALECT_ESI_PASSDETAILS_H
17 #define DIALECT_ESI_PASSDETAILS_H
18 
24 #include "circt/Dialect/HW/HWOps.h"
26 #include "circt/Dialect/SV/SVOps.h"
28 #include "circt/Support/LLVM.h"
29 
30 #include "mlir/IR/DialectRegistry.h"
31 #include "mlir/Pass/Pass.h"
32 #include "mlir/Transforms/DialectConversion.h"
33 
34 namespace circt {
35 namespace esi {
36 namespace detail {
37 
38 /// Generic pattern for removing an op during pattern conversion.
39 template <typename OpTy>
40 struct RemoveOpLowering : public OpConversionPattern<OpTy> {
43 
44  LogicalResult
45  matchAndRewrite(OpTy op, OpAdaptor adaptor,
46  ConversionPatternRewriter &rewriter) const final {
47  rewriter.eraseOp(op);
48  return success();
49  }
50 };
51 
52 StringAttr getTypeID(Type t);
53 uint64_t getWidth(Type t);
54 
55 /// Assist the lowering steps for conversions which need to create auxiliary IR.
56 class ESIHWBuilder : public circt::ImplicitLocOpBuilder {
57 public:
58  ESIHWBuilder(Operation *top);
59 
60  ArrayAttr getStageParameterList(Attribute value);
61 
62  hw::HWModuleExternOp declareStage(Operation *symTable, PipelineStageOp);
65  sv::InterfaceOp getOrConstructInterface(ChannelType);
66  sv::InterfaceOp constructInterface(ChannelType);
67 
68  // A bunch of constants for use in various places below.
69  const StringAttr a, aValid, aReady, x, xValid, xReady;
72  const StringAttr clk, rst;
73  const StringAttr width;
74 
75  // Various identifier strings. Keep them all here in case we rename them.
76  static constexpr char dataStr[] = "data", validStr[] = "valid",
77  readyStr[] = "ready", sourceStr[] = "source",
78  sinkStr[] = "sink";
79 
80 private:
81  /// Construct a type-appropriate name for the interface, making sure it's not
82  /// taken in the symbol table.
83  StringAttr constructInterfaceName(ChannelType);
84 
85  Type getClockType();
86 
87  std::optional<hw::HWModuleExternOp> declaredCosimEndpointToHostModule;
88  std::optional<hw::HWModuleExternOp> declaredCosimEndpointFromHostModule;
89  llvm::DenseMap<Type, hw::HWModuleExternOp> declaredStage;
90  llvm::DenseMap<Type, sv::InterfaceOp> portTypeLookup;
91 };
92 } // namespace detail
93 } // namespace esi
94 } // namespace circt
95 
96 #endif // DIALECT_ESI_PASSDETAILS_H
Assist the lowering steps for conversions which need to create auxiliary IR.
Definition: PassDetails.h:56
hw::HWModuleExternOp declareCosimEndpointFromHostModule(Operation *symTable)
Definition: ESIPasses.cpp:204
static constexpr char validStr[]
Definition: PassDetails.h:76
static constexpr char sinkStr[]
Definition: PassDetails.h:78
std::optional< hw::HWModuleExternOp > declaredCosimEndpointToHostModule
Definition: PassDetails.h:87
llvm::DenseMap< Type, sv::InterfaceOp > portTypeLookup
Definition: PassDetails.h:90
static constexpr char readyStr[]
Definition: PassDetails.h:77
hw::HWModuleExternOp declareCosimEndpointToHostModule(Operation *symTable)
Write an 'ExternModuleOp' to use a hand-coded SystemVerilog module.
Definition: ESIPasses.cpp:176
static constexpr char dataStr[]
Definition: PassDetails.h:76
StringAttr constructInterfaceName(ChannelType)
Construct a type-appropriate name for the interface, making sure it's not taken in the symbol table.
Definition: ESIPasses.cpp:98
sv::InterfaceOp constructInterface(ChannelType)
Definition: ESIPasses.cpp:243
sv::InterfaceOp getOrConstructInterface(ChannelType)
Return the InterfaceType which corresponds to an ESI port type.
Definition: ESIPasses.cpp:234
std::optional< hw::HWModuleExternOp > declaredCosimEndpointFromHostModule
Definition: PassDetails.h:88
llvm::DenseMap< Type, hw::HWModuleExternOp > declaredStage
Definition: PassDetails.h:89
static constexpr char sourceStr[]
Definition: PassDetails.h:77
hw::HWModuleExternOp declareStage(Operation *symTable, PipelineStageOp)
Write an 'ExternModuleOp' to use a hand-coded SystemVerilog module.
Definition: ESIPasses.cpp:137
ArrayAttr getStageParameterList(Attribute value)
Return a parameter list for the stage module with the specified value.
Definition: ESIPasses.cpp:127
uint64_t getWidth(Type t)
Definition: ESIPasses.cpp:32
StringAttr getTypeID(Type t)
Definition: ESIPasses.cpp:26
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
Definition: DebugAnalysis.h:21
Definition: esi.py:1
Generic pattern for removing an op during pattern conversion.
Definition: PassDetails.h:40
typename OpConversionPattern< OpTy >::OpAdaptor OpAdaptor
Definition: PassDetails.h:42
LogicalResult matchAndRewrite(OpTy op, OpAdaptor adaptor, ConversionPatternRewriter &rewriter) const final
Definition: PassDetails.h:45