CIRCT 24.0.0git
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PassDetails.h
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1//===- PassDetails.h - ESI pass class details -----------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Stuff shared between the different ESI passes.
10//
11//===----------------------------------------------------------------------===//
12
13// clang-tidy seems to expect the absolute path in the header guard on some
14// systems, so just disable it.
15// NOLINTNEXTLINE(llvm-header-guard)
16#ifndef DIALECT_ESI_PASSDETAILS_H
17#define DIALECT_ESI_PASSDETAILS_H
18
28#include "circt/Support/LLVM.h"
29
30#include "mlir/IR/DialectRegistry.h"
31#include "mlir/Pass/Pass.h"
32#include "mlir/Transforms/DialectConversion.h"
33
34namespace circt {
35namespace esi {
36namespace detail {
37
38/// Generic pattern for removing an op during pattern conversion.
39template <typename OpTy>
43
44 LogicalResult
45 matchAndRewrite(OpTy op, OpAdaptor adaptor,
46 ConversionPatternRewriter &rewriter) const final {
47 rewriter.eraseOp(op);
48 return success();
49 }
50};
51
52StringAttr getTypeID(Type t);
53uint64_t getWidth(Type t);
54
55/// Assist the lowering steps for conversions which need to create auxiliary IR.
56class ESIHWBuilder : public circt::ImplicitLocOpBuilder {
57public:
58 ESIHWBuilder(Operation *top);
59
60 /// Get the parameter list for the stage module. Values may be null for the
61 /// declaration.
62 ArrayAttr getStageParameterList(Attribute widthValue,
63 Attribute dataDelayValue);
64
65 hw::HWModuleExternOp declareStage(Operation *symTable, PipelineStageOp);
68
69 // A bunch of constants for use in various places below.
70 const StringAttr a, aValid, aReady, x, xValid, xReady;
73 const StringAttr clk, rst;
74 const StringAttr width, dataDelay;
75
76private:
77 Type getClockType();
78
79 std::optional<hw::HWModuleExternOp> declaredCosimEndpointToHostModule;
80 std::optional<hw::HWModuleExternOp> declaredCosimEndpointFromHostModule;
81 llvm::DenseMap<Type, hw::HWModuleExternOp> declaredStage;
82};
83} // namespace detail
84} // namespace esi
85} // namespace circt
86
87#endif // DIALECT_ESI_PASSDETAILS_H
return success()
hw::HWModuleExternOp declareCosimEndpointFromHostModule(Operation *symTable)
std::optional< hw::HWModuleExternOp > declaredCosimEndpointToHostModule
Definition PassDetails.h:79
hw::HWModuleExternOp declareCosimEndpointToHostModule(Operation *symTable)
Write an 'ExternModuleOp' to use a hand-coded SystemVerilog module.
ArrayAttr getStageParameterList(Attribute widthValue, Attribute dataDelayValue)
Get the parameter list for the stage module.
Definition ESIPasses.cpp:94
std::optional< hw::HWModuleExternOp > declaredCosimEndpointFromHostModule
Definition PassDetails.h:80
llvm::DenseMap< Type, hw::HWModuleExternOp > declaredStage
Definition PassDetails.h:81
hw::HWModuleExternOp declareStage(Operation *symTable, PipelineStageOp)
Write an 'ExternModuleOp' to use a hand-coded SystemVerilog module.
uint64_t getWidth(Type t)
Definition ESIPasses.cpp:30
StringAttr getTypeID(Type t)
Definition ESIPasses.cpp:24
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
Generic pattern for removing an op during pattern conversion.
Definition PassDetails.h:40
typename OpConversionPattern< OpTy >::OpAdaptor OpAdaptor
Definition PassDetails.h:42
LogicalResult matchAndRewrite(OpTy op, OpAdaptor adaptor, ConversionPatternRewriter &rewriter) const final
Definition PassDetails.h:45