CIRCT  19.0.0git
PassDetails.h
Go to the documentation of this file.
1 //===- PassDetails.h - ESI pass class details -----------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Stuff shared between the different ESI passes.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 // clang-tidy seems to expect the absolute path in the header guard on some
14 // systems, so just disable it.
15 // NOLINTNEXTLINE(llvm-header-guard)
16 #ifndef DIALECT_ESI_PASSDETAILS_H
17 #define DIALECT_ESI_PASSDETAILS_H
18 
24 #include "circt/Dialect/HW/HWOps.h"
26 #include "circt/Dialect/SV/SVOps.h"
28 #include "circt/Support/LLVM.h"
29 
30 #include "mlir/IR/DialectRegistry.h"
31 #include "mlir/Pass/Pass.h"
32 #include "mlir/Transforms/DialectConversion.h"
33 
34 namespace circt {
35 namespace esi {
36 
37 #define GEN_PASS_CLASSES
38 #include "circt/Dialect/ESI/ESIPasses.h.inc"
39 
40 } // namespace esi
41 } // namespace circt
42 
43 namespace circt {
44 namespace esi {
45 namespace detail {
46 
47 /// Generic pattern for removing an op during pattern conversion.
48 template <typename OpTy>
49 struct RemoveOpLowering : public OpConversionPattern<OpTy> {
52 
53  LogicalResult
54  matchAndRewrite(OpTy op, OpAdaptor adaptor,
55  ConversionPatternRewriter &rewriter) const final {
56  rewriter.eraseOp(op);
57  return success();
58  }
59 };
60 
61 StringAttr getTypeID(Type t);
62 uint64_t getWidth(Type t);
63 
64 /// Assist the lowering steps for conversions which need to create auxiliary IR.
65 class ESIHWBuilder : public circt::ImplicitLocOpBuilder {
66 public:
67  ESIHWBuilder(Operation *top);
68 
69  ArrayAttr getStageParameterList(Attribute value);
70 
71  hw::HWModuleExternOp declareStage(Operation *symTable, PipelineStageOp);
74  sv::InterfaceOp getOrConstructInterface(ChannelType);
75  sv::InterfaceOp constructInterface(ChannelType);
76 
77  // A bunch of constants for use in various places below.
78  const StringAttr a, aValid, aReady, x, xValid, xReady;
81  const StringAttr clk, rst;
82  const StringAttr width;
83 
84  // Various identifier strings. Keep them all here in case we rename them.
85  static constexpr char dataStr[] = "data", validStr[] = "valid",
86  readyStr[] = "ready", sourceStr[] = "source",
87  sinkStr[] = "sink";
88 
89 private:
90  /// Construct a type-appropriate name for the interface, making sure it's not
91  /// taken in the symbol table.
92  StringAttr constructInterfaceName(ChannelType);
93 
94  Type getClockType();
95 
96  std::optional<hw::HWModuleExternOp> declaredCosimEndpointToHostModule;
97  std::optional<hw::HWModuleExternOp> declaredCosimEndpointFromHostModule;
98  llvm::DenseMap<Type, hw::HWModuleExternOp> declaredStage;
99  llvm::DenseMap<Type, sv::InterfaceOp> portTypeLookup;
100 };
101 } // namespace detail
102 } // namespace esi
103 } // namespace circt
104 
105 #endif // DIALECT_ESI_PASSDETAILS_H
Assist the lowering steps for conversions which need to create auxiliary IR.
Definition: PassDetails.h:65
hw::HWModuleExternOp declareCosimEndpointFromHostModule(Operation *symTable)
Definition: ESIPasses.cpp:204
static constexpr char validStr[]
Definition: PassDetails.h:85
static constexpr char sinkStr[]
Definition: PassDetails.h:87
std::optional< hw::HWModuleExternOp > declaredCosimEndpointToHostModule
Definition: PassDetails.h:96
llvm::DenseMap< Type, sv::InterfaceOp > portTypeLookup
Definition: PassDetails.h:99
static constexpr char readyStr[]
Definition: PassDetails.h:86
hw::HWModuleExternOp declareCosimEndpointToHostModule(Operation *symTable)
Write an 'ExternModuleOp' to use a hand-coded SystemVerilog module.
Definition: ESIPasses.cpp:176
static constexpr char dataStr[]
Definition: PassDetails.h:85
StringAttr constructInterfaceName(ChannelType)
Construct a type-appropriate name for the interface, making sure it's not taken in the symbol table.
Definition: ESIPasses.cpp:98
sv::InterfaceOp constructInterface(ChannelType)
Definition: ESIPasses.cpp:243
sv::InterfaceOp getOrConstructInterface(ChannelType)
Return the InterfaceType which corresponds to an ESI port type.
Definition: ESIPasses.cpp:234
std::optional< hw::HWModuleExternOp > declaredCosimEndpointFromHostModule
Definition: PassDetails.h:97
llvm::DenseMap< Type, hw::HWModuleExternOp > declaredStage
Definition: PassDetails.h:98
static constexpr char sourceStr[]
Definition: PassDetails.h:86
hw::HWModuleExternOp declareStage(Operation *symTable, PipelineStageOp)
Write an 'ExternModuleOp' to use a hand-coded SystemVerilog module.
Definition: ESIPasses.cpp:137
ArrayAttr getStageParameterList(Attribute value)
Return a parameter list for the stage module with the specified value.
Definition: ESIPasses.cpp:127
uint64_t getWidth(Type t)
Definition: ESIPasses.cpp:32
StringAttr getTypeID(Type t)
Definition: ESIPasses.cpp:26
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
Definition: DebugAnalysis.h:21
Definition: esi.py:1
Generic pattern for removing an op during pattern conversion.
Definition: PassDetails.h:49
typename OpConversionPattern< OpTy >::OpAdaptor OpAdaptor
Definition: PassDetails.h:51
LogicalResult matchAndRewrite(OpTy op, OpAdaptor adaptor, ConversionPatternRewriter &rewriter) const final
Definition: PassDetails.h:54