17 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
19 #define DEBUG_TYPE "aig-lower-word-to-bits"
23 #define GEN_PASS_DEF_LOWERWORDTOBITS
24 #include "circt/Dialect/AIG/AIGPasses.h.inc"
28 using namespace circt;
40 LogicalResult matchAndRewrite(AndInverterOp op,
41 PatternRewriter &rewriter)
const override {
42 auto width = op.getType().getIntOrFloatBitWidth();
46 SmallVector<Value> results;
49 for (int64_t i = width - 1; i >= 0; --i) {
50 SmallVector<Value> operands;
51 for (
auto operand : op.getOperands()) {
56 if (
concat.getNumOperands() == width &&
57 llvm::all_of(
concat.getOperandTypes(), [](Type type) {
58 return type.getIntOrFloatBitWidth() == 1;
61 operands.push_back(
concat.getOperand(width - i - 1));
69 results.push_back(rewriter.create<AndInverterOp>(op.getLoc(), operands,
70 op.getInvertedAttr()));
85 struct LowerWordToBitsPass
86 :
public impl::LowerWordToBitsBase<LowerWordToBitsPass> {
87 void runOnOperation()
override;
91 void LowerWordToBitsPass::runOnOperation() {
92 RewritePatternSet
patterns(&getContext());
93 patterns.add<WordRewritePattern>(&getContext());
95 mlir::FrozenRewritePatternSet frozenPatterns(std::move(
patterns));
96 mlir::GreedyRewriteConfig config;
98 config.useTopDownTraversal =
true;
100 if (failed(mlir::applyPatternsAndFoldGreedily(getOperation(), frozenPatterns,
102 return signalPassFailure();
static SmallVector< T > concat(const SmallVectorImpl< T > &a, const SmallVectorImpl< T > &b)
Returns a new vector containing the concatenation of vectors a and b.
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.