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CIRCT 24.0.0git
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#include "circt/Dialect/Calyx/CalyxOps.h"#include "circt/Dialect/Comb/CombOps.h"#include "circt/Dialect/FSM/FSMOps.h"#include "circt/Dialect/HW/HWAttributes.h"#include "circt/Dialect/HW/HWOps.h"#include "circt/Dialect/HW/HWTypes.h"#include "mlir/IR/AsmState.h"#include "mlir/IR/Builders.h"#include "mlir/IR/BuiltinAttributes.h"#include "mlir/IR/BuiltinTypes.h"#include "mlir/IR/Diagnostics.h"#include "mlir/IR/DialectImplementation.h"#include "mlir/IR/PatternMatch.h"#include "mlir/IR/SymbolTable.h"#include "mlir/Interfaces/FunctionImplementation.h"#include "mlir/Support/LLVM.h"#include "llvm/ADT/DenseMap.h"#include "llvm/ADT/MapVector.h"#include "llvm/ADT/PriorityQueue.h"#include "llvm/ADT/STLExtras.h"#include "llvm/ADT/SmallSet.h"#include "llvm/ADT/StringExtras.h"#include "llvm/ADT/TypeSwitch.h"#include "llvm/Support/Casting.h"#include "circt/Dialect/Calyx/CalyxInterfaces.cpp.inc"#include "circt/Dialect/Calyx/Calyx.cpp.inc"
Go to the source code of this file.
Classes | |
| struct | CollapseUnaryControl< CtrlOp > |
| This pattern collapses a calyx.seq or calyx.par operation when it contains exactly one calyx.enable operation. More... | |
| struct | EmptyIfBody |
| This pattern checks for one of two cases that will lead to IfOp deletion: (1) Then and Else bodies are both empty. More... | |
| struct | EmptyStaticIfBody |
| This pattern checks for one of two cases that will lead to StaticIfOp deletion: (1) Then and Else bodies are both empty. More... | |
Macros | |
| #define | ImplBinPipeOpCellInterface(OpType, outName) |
| #define | ImplUnaryOpCellInterface(OpType) |
| #define | ImplBinOpCellInterface(OpType) |
| #define | GET_OP_CLASSES |
Functions | |
| template<typename Op > | |
| static LogicalResult | verifyNotComplexSource (Op op) |
| Verify that the value is not a "complex" value. | |
| static std::string | valueName (Operation *scopeOp, Value v) |
Convenience function for getting the SSA name of v under the scope of operation scopeOp. | |
| static bool | isPort (Value value) |
| Returns whether this value is either (1) a port on a ComponentOp or (2) a port on a cell interface. | |
| static bool | hasControlRegion (Operation *op) |
| Returns whether the given operation has a control region. | |
| static bool | isStaticControl (Operation *op) |
| Returns whether the given operation is a static control operator. | |
| static LogicalResult | verifyControlBody (Operation *op) |
| Verifies the body of a ControlLikeOp. | |
| static ParseResult | parseGroupPort (OpAsmParser &parser, OperationState &result) |
| template<typename GroupPortType > | |
| static void | printGroupPort (OpAsmPrinter &p, GroupPortType op) |
| template<typename OpTy > | |
| static LogicalResult | collapseControl (OpTy controlOp, PatternRewriter &rewriter) |
| template<typename OpTy > | |
| static LogicalResult | emptyControl (OpTy controlOp, PatternRewriter &rewriter) |
| template<typename OpTy > | |
| static void | eraseControlWithGroupAndConditional (OpTy op, PatternRewriter &rewriter) |
| A helper function to check whether the conditional and group (if it exists) needs to be erased to maintain a valid state of a Calyx program. | |
| template<typename OpTy > | |
| static void | eraseControlWithConditional (OpTy op, PatternRewriter &rewriter) |
| A helper function to check whether the conditional needs to be erased to maintain a valid state of a Calyx program. | |
| template<typename ComponentTy > | |
| static void | printComponentInterface (OpAsmPrinter &p, ComponentInterface comp) |
| static ParseResult | parsePortDefList (OpAsmParser &parser, OperationState &result, SmallVectorImpl< OpAsmParser::Argument > &ports, SmallVectorImpl< Type > &portTypes, SmallVectorImpl< NamedAttrList > &portAttrs) |
Parses the ports of a Calyx component signature, and adds the corresponding port names to attrName. | |
| static ParseResult | parseComponentSignature (OpAsmParser &parser, OperationState &result, SmallVectorImpl< OpAsmParser::Argument > &ports, SmallVectorImpl< Type > &portTypes) |
| Parses the signature of a Calyx component. | |
| template<typename ComponentTy > | |
| static ParseResult | parseComponentInterface (OpAsmParser &parser, OperationState &result) |
| template<typename T > | |
| static SmallVector< T > | concat (const SmallVectorImpl< T > &a, const SmallVectorImpl< T > &b) |
Returns a new vector containing the concatenation of vectors a and b. | |
| template<typename ComponentTy > | |
| static void | buildComponentLike (OpBuilder &builder, OperationState &result, StringAttr name, ArrayRef< PortInfo > ports, bool combinational) |
| template<typename Op > | |
| static Op | getControlOrWiresFrom (ComponentOp op) |
| This is a helper function that should only be used to get the WiresOp or ControlOp of a ComponentOp, which are guaranteed to exist and generally at the end of a component's body. | |
| static Value | getBlockArgumentWithName (StringRef name, ComponentOp op) |
| Returns the Block argument with the given name from a ComponentOp. | |
| template<typename Pred > | |
| static SmallVector< PortInfo > | getFilteredPorts (ComponentOp op, Pred p) |
| A helper function to return a filtered subset of a component's ports. | |
| static LogicalResult | hasRequiredPorts (ComponentOp op) |
| Determines whether the given ComponentOp has all the required ports. | |
| template<typename Pred > | |
| static SmallVector< PortInfo > | getFilteredPorts (CombComponentOp op, Pred p) |
| A helper function to return a filtered subset of a comb component's ports. | |
| static LogicalResult | isCombinational (Value value, GroupInterface group) |
| Verifies the defining operation of a value is combinational. | |
| static bool | portIsUsedInGroup (GroupInterface group, Value port, bool isDriven) |
| Determines whether the given port is used in the group. | |
| static LogicalResult | portDrivenByGroup (GroupInterface groupOp, Value port) |
Checks whether port is driven from within groupOp. | |
| static LogicalResult | allPortsDrivenByGroup (GroupInterface group, ValueRange ports) |
| Checks whether all ports are driven within the group. | |
| static LogicalResult | anyPortsDrivenByGroup (GroupInterface group, ValueRange ports) |
| Checks whether any ports are driven within the group. | |
| static LogicalResult | anyPortsReadByGroup (GroupInterface group, ValueRange ports) |
| Checks whether any ports are read within the group. | |
| static LogicalResult | verifyPrimitivePortDriving (AssignOp assign, GroupInterface group) |
| Verifies that certain ports of primitives are either driven or read together. | |
| static void | getCellAsmResultNames (OpAsmSetValueNameFn setNameFn, Operation *op, ArrayRef< StringRef > portNames) |
| Gives each result of the cell a meaningful name in the form: <instance-name>. | |
| static LogicalResult | verifyPortDirection (Operation *op, Value value, bool isDestination) |
| Determines whether the given direction is valid with the given inputs. | |
| static LogicalResult | verifyAssignOpValue (AssignOp op, bool isDestination) |
| Verifies the value of a given assignment operation. | |
| static LogicalResult | verifyInstanceOpType (InstanceOp instance, ComponentInterface referencedComponent) |
| Verifies the port information in comparison with the referenced component of an instance. | |
| static LogicalResult | verifyPrimitiveOpType (PrimitiveOp instance, hw::HWModuleExternOp referencedPrimitive) |
| Verifies the port information in comparison with the referenced component of an instance. | |
| Direction | convertHWDirectionToCalyx (hw::ModulePort::Direction direction) |
| static DictionaryAttr | cleanCalyxPortAttrs (OpBuilder builder, DictionaryAttr dict) |
| Returns a new DictionaryAttr containing only the calyx dialect attrs in the input DictionaryAttr. | |
| static ParseResult | parseParameterList (OpAsmParser &parser, SmallVector< Attribute > ¶meters) |
| Parse an parameter list if present. | |
| static ParseResult | parseParameterList (OpAsmParser &parser, ArrayAttr ¶meters) |
| Shim to also use this for the InstanceOp custom parser. | |
| static void | printParameterList (OpAsmPrinter &p, Operation *op, ArrayAttr parameters) |
| Print a parameter list for a module or instance. Same format as HW dialect. | |
| template<typename OpTy > | |
| static std::optional< EnableOp > | getLastEnableOp (OpTy parent) |
Returns the last EnableOp within the child tree of 'parentSeqOp' or parentStaticSeqOp. | |
| template<typename OpTy > | |
| static llvm::MapVector< StringAttr, EnableOp > | getAllEnableOpsInImmediateBody (OpTy parent) |
| Returns a mapping of {enabled Group name, EnableOp} for all EnableOps within the immediate ParOp's body. | |
| template<typename IfOpTy , typename TailOpTy > | |
| static bool | hasCommonTailPatternPreConditions (IfOpTy op) |
| Checks preconditions for the common tail pattern. | |
| template<typename IfOpTy , typename SeqOpTy > | |
| static LogicalResult | commonTailPatternWithSeq (IfOpTy ifOp, PatternRewriter &rewriter) |
| seq { if a with @G { if a with @G { seq { ... calyx.enable @A } seq { ... } else { -> } else { seq { ... calyx.enable @A } seq { ... } } } calyx.enable @A } | |
| template<typename OpTy , typename ParOpTy > | |
| static LogicalResult | commonTailPatternWithPar (OpTy controlOp, PatternRewriter &rewriter) |
| if a with @G { par { par { if a with @G { ... par { ... } calyx.enable @A } else { calyx.enable @B -> par { ... } } } } else { calyx.enable @A par { calyx.enable @B ... } calyx.enable @A calyx.enable @B } } | |
| template<typename OpTy > | |
| static LogicalResult | zeroRepeat (OpTy op, PatternRewriter &rewriter) |
| static ParseResult | parseParameterList (OpAsmParser &parser, OperationState &result, SmallVectorImpl< OpAsmParser::UnresolvedOperand > &ports, SmallVectorImpl< OpAsmParser::UnresolvedOperand > &inputs, SmallVectorImpl< Attribute > &portNames, SmallVectorImpl< Attribute > &inputNames, SmallVectorImpl< Type > &types) |
| static LogicalResult | verifyInvokeOpValue (InvokeOp &op, Value &value, bool isDestination) |
| static LogicalResult | verifyComplexLogic (InvokeOp &op, Value &value) |
| static Operation * | lookupCell (ComponentOp componentOp, StringRef name) |
| static size_t | getHwModuleExtGoOrDonePortNumber (hw::HWModuleExternOp &moduleExternOp, bool isGo) |
| ImplBinPipeOpCellInterface (MultPipeLibOp, "out") ImplBinPipeOpCellInterface(DivUPipeLibOp | |
| out_quotient | ImplBinPipeOpCellInterface (DivSPipeLibOp, "out_quotient") ImplBinPipeOpCellInterface(RemUPipeLibOp |
| #define GET_OP_CLASSES |
| #define ImplBinOpCellInterface | ( | OpType | ) |
Definition at line 3078 of file CalyxOps.cpp.
| #define ImplBinPipeOpCellInterface | ( | OpType, | |
| outName | |||
| ) |
Definition at line 3032 of file CalyxOps.cpp.
| #define ImplUnaryOpCellInterface | ( | OpType | ) |
Definition at line 3066 of file CalyxOps.cpp.
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Checks whether all ports are driven within the group.
Definition at line 1314 of file CalyxOps.cpp.
References portIsUsedInGroup().
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Checks whether any ports are driven within the group.
Definition at line 1334 of file CalyxOps.cpp.
References portIsUsedInGroup().
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Checks whether any ports are read within the group.
Definition at line 1354 of file CalyxOps.cpp.
References portIsUsedInGroup().
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Definition at line 564 of file CalyxOps.cpp.
References concat(), and circt::calyx::direction::packAttribute().
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Returns a new DictionaryAttr containing only the calyx dialect attrs in the input DictionaryAttr.
Also strips the 'calyx.' prefix from these attrs.
Definition at line 1867 of file CalyxOps.cpp.
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Definition at line 328 of file CalyxOps.cpp.
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if a with @G { par { par { if a with @G { ... par { ... } calyx.enable @A } else { calyx.enable @B -> par { ... } } } } else { calyx.enable @A par { calyx.enable @B ... } calyx.enable @A calyx.enable @B } }
Definition at line 2486 of file CalyxOps.cpp.
References getAllEnableOpsInImmediateBody().
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seq { if a with @G { if a with @G { seq { ... calyx.enable @A } seq { ... } else { -> } else { seq { ... calyx.enable @A } seq { ... } } } calyx.enable @A }
Definition at line 2437 of file CalyxOps.cpp.
References getLastEnableOp().
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Returns a new vector containing the concatenation of vectors a and b.
Definition at line 555 of file CalyxOps.cpp.
References concat().
Referenced by buildComponentLike(), and concat().
| Direction convertHWDirectionToCalyx | ( | hw::ModulePort::Direction | direction | ) |
Definition at line 1842 of file CalyxOps.cpp.
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Definition at line 347 of file CalyxOps.cpp.
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A helper function to check whether the conditional needs to be erased to maintain a valid state of a Calyx program.
If these have no more uses, they will be erased.
Definition at line 386 of file CalyxOps.cpp.
Referenced by EmptyStaticIfBody::matchAndRewrite().
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A helper function to check whether the conditional and group (if it exists) needs to be erased to maintain a valid state of a Calyx program.
If these have no more uses, they will be erased.
Definition at line 359 of file CalyxOps.cpp.
Referenced by EmptyIfBody::matchAndRewrite().
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Returns a mapping of {enabled Group name, EnableOp} for all EnableOps within the immediate ParOp's body.
Definition at line 2393 of file CalyxOps.cpp.
Referenced by commonTailPatternWithPar().
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Returns the Block argument with the given name from a ComponentOp.
If the name doesn't exist, returns an empty Value.
Definition at line 644 of file CalyxOps.cpp.
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Gives each result of the cell a meaningful name in the form: <instance-name>.
<port-name>
Definition at line 1477 of file CalyxOps.cpp.
References assert().
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This is a helper function that should only be used to get the WiresOp or ControlOp of a ComponentOp, which are guaranteed to exist and generally at the end of a component's body.
In the worst case, this will run in linear time with respect to the number of instances within the component.
Definition at line 634 of file CalyxOps.cpp.
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A helper function to return a filtered subset of a comb component's ports.
Definition at line 829 of file CalyxOps.cpp.
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A helper function to return a filtered subset of a component's ports.
Definition at line 695 of file CalyxOps.cpp.
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Definition at line 2906 of file CalyxOps.cpp.
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Returns the last EnableOp within the child tree of 'parentSeqOp' or parentStaticSeqOp.
If no EnableOp was found (e.g. a "calyx.par" operation is present), returns None.
Definition at line 2373 of file CalyxOps.cpp.
References getLastEnableOp().
Referenced by commonTailPatternWithSeq(), and getLastEnableOp().
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Checks preconditions for the common tail pattern.
This canonicalization is stringent about not entering nested control operations, as this may cause unintentional changes in behavior. We only look for two cases: (1) both regions are ParOps, and (2) both regions are SeqOps. The case when these are different, e.g. ParOp and SeqOp, will only produce less optimal code, or even worse, change the behavior.
Definition at line 2413 of file CalyxOps.cpp.
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Returns whether the given operation has a control region.
Definition at line 151 of file CalyxOps.cpp.
Referenced by verifyControlBody(), and circt::calyx::verifyControlLikeOp().
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Determines whether the given ComponentOp has all the required ports.
Definition at line 720 of file CalyxOps.cpp.
References circt::calyx::clkPort, circt::calyx::donePort, circt::calyx::goPort, and circt::calyx::resetPort.
| out_quotient ImplBinPipeOpCellInterface | ( | DivSPipeLibOp | , |
| "out_quotient" | |||
| ) |
| ImplBinPipeOpCellInterface | ( | MultPipeLibOp | , |
| "out" | |||
| ) |
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Verifies the defining operation of a value is combinational.
Definition at line 1074 of file CalyxOps.cpp.
References valueName(), and writePorts.
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Returns whether this value is either (1) a port on a ComponentOp or (2) a port on a cell interface.
Definition at line 136 of file CalyxOps.cpp.
Referenced by DiscoverLoops::dfsTraverse(), verifyAssignOpValue(), and verifyInvokeOpValue().
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Returns whether the given operation is a static control operator.
Definition at line 157 of file CalyxOps.cpp.
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Definition at line 2827 of file CalyxOps.cpp.
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Definition at line 518 of file CalyxOps.cpp.
References parseComponentSignature().
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Parses the signature of a Calyx component.
Definition at line 472 of file CalyxOps.cpp.
References context, circt::calyx::direction::packAttribute(), and parsePortDefList().
Referenced by parseComponentInterface().
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Definition at line 285 of file CalyxOps.cpp.
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Shim to also use this for the InstanceOp custom parser.
Definition at line 1932 of file CalyxOps.cpp.
References parseParameterList().
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Definition at line 2697 of file CalyxOps.cpp.
References parseType().
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Parse an parameter list if present.
Same format as HW dialect. module-parameter-list ::= < parameter-decl (, parameter-decl)* > parameter-decl ::= identifier : type parameter-decl ::= identifier : type = attribute
Definition at line 1906 of file CalyxOps.cpp.
Referenced by parseParameterList().
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Parses the ports of a Calyx component signature, and adds the corresponding port names to attrName.
Definition at line 444 of file CalyxOps.cpp.
References parsePort().
Referenced by parseComponentSignature().
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Checks whether port is driven from within groupOp.
Definition at line 1287 of file CalyxOps.cpp.
References portIsUsedInGroup().
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Determines whether the given port is used in the group.
Its use depends on the isDriven value; if true, then the port should be a destination in an AssignOp. Otherwise, it should be the source, i.e. a read.
Definition at line 1265 of file CalyxOps.cpp.
Referenced by allPortsDrivenByGroup(), anyPortsDrivenByGroup(), anyPortsReadByGroup(), and portDrivenByGroup().
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Definition at line 404 of file CalyxOps.cpp.
References circt::calyx::PortInfo::attributes, circt::calyx::PortInfo::name, and circt::calyx::PortInfo::type.
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Definition at line 313 of file CalyxOps.cpp.
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Print a parameter list for a module or instance. Same format as HW dialect.
Definition at line 1944 of file CalyxOps.cpp.
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Convenience function for getting the SSA name of v under the scope of operation scopeOp.
Definition at line 122 of file CalyxOps.cpp.
Referenced by isCombinational().
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Verifies the value of a given assignment operation.
The boolean isDestination is used to distinguish whether the destination or source of the AssignOp is to be verified.
Definition at line 1524 of file CalyxOps.cpp.
References isPort(), verifyNotComplexSource(), and verifyPortDirection().
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Definition at line 2815 of file CalyxOps.cpp.
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Verifies the body of a ControlLikeOp.
Definition at line 170 of file CalyxOps.cpp.
References hasControlRegion().
Referenced by circt::calyx::verifyControlLikeOp().
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Verifies the port information in comparison with the referenced component of an instance.
This helper function avoids conducting a lookup for the referenced component twice.
Definition at line 1624 of file CalyxOps.cpp.
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Definition at line 2807 of file CalyxOps.cpp.
References isPort(), and verifyPortDirection().
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Verify that the value is not a "complex" value.
For example, the source of an AssignOp should be a constant or port, e.g. and = comb.and a, b : i1 calyx.assign port = c1_i1 ? and : i1 // Incorrect calyx.assign port = and ? c1_i1 : i1 // Correct TODO(Calyx): This is useful to verify current MLIR can be lowered to the native compiler. Remove this when Calyx supports wire declarations. See: https://github.com/llvm/circt/pull/1774 for context.
Definition at line 105 of file CalyxOps.cpp.
Referenced by verifyAssignOpValue().
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Determines whether the given direction is valid with the given inputs.
The isDestination boolean is used to distinguish whether the value is a source or a destination.
Definition at line 1494 of file CalyxOps.cpp.
References assert(), circt::calyx::PortInfo::direction, and circt::calyx::getPortInfo().
Referenced by verifyAssignOpValue(), and verifyInvokeOpValue().
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Verifies the port information in comparison with the referenced component of an instance.
This helper function avoids conducting a lookup for the referenced component twice.
Definition at line 1731 of file CalyxOps.cpp.
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Verifies that certain ports of primitives are either driven or read together.
Definition at line 1375 of file CalyxOps.cpp.
Referenced by circt::calyx::verifyGroupInterface().
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Definition at line 2665 of file CalyxOps.cpp.