14 #include "mlir/IR/ImplicitLocOpBuilder.h"
15 #include "llvm/ADT/APSInt.h"
16 #include "llvm/ADT/BitVector.h"
17 #include "llvm/ADT/PostOrderIterator.h"
18 #include "llvm/Support/Debug.h"
20 #define DEBUG_TYPE "firrtl-remove-unused-ports"
22 using namespace circt;
23 using namespace firrtl;
26 struct RemoveUnusedPortsPass
27 :
public RemoveUnusedPortsBase<RemoveUnusedPortsPass> {
28 void runOnOperation()
override;
29 void removeUnusedModulePorts(FModuleOp module,
36 bool ignoreDontTouch =
false;
40 void RemoveUnusedPortsPass::runOnOperation() {
41 auto &instanceGraph = getAnalysis<InstanceGraph>();
42 LLVM_DEBUG(
llvm::dbgs() <<
"===----- Remove unused ports -----==="
46 for (
auto *node : llvm::post_order(&instanceGraph))
47 if (
auto module = dyn_cast<FModuleOp>(*node->getModule()))
49 if (!module.isPublic())
50 removeUnusedModulePorts(module, node);
53 void RemoveUnusedPortsPass::removeUnusedModulePorts(
55 LLVM_DEBUG(
llvm::dbgs() <<
"Prune ports of module: " << module.getName()
59 SmallVector<std::optional<APSInt>> outputPortConstants;
60 auto ports = module.getPorts();
62 llvm::BitVector removalPortIndexes(ports.size());
64 for (
const auto &e : llvm::enumerate(ports)) {
65 unsigned index = e.index();
66 auto port = e.value();
67 auto arg = module.getArgument(index);
71 if ((
hasDontTouch(arg) || !port.annotations.canBeDeleted()) &&
81 if (port.isInput() && !arg.use_empty())
85 auto port = a->getInstance()->getResult(arg.getArgNumber());
86 return port.getUses().empty();
90 if (port.isOutput()) {
91 if (arg.use_empty()) {
94 outputPortConstants.push_back(std::nullopt);
95 }
else if (llvm::all_of(instanceGraphNode->
uses(), portIsUnused)) {
97 auto builder = ImplicitLocOpBuilder::atBlockBegin(
98 arg.getLoc(), module.getBodyBlock());
99 auto wire =
builder.create<WireOp>(arg.getType());
100 arg.replaceAllUsesWith(wire.getResult());
101 outputPortConstants.push_back(std::nullopt);
102 }
else if (arg.hasOneUse()) {
105 Operation *op = arg.use_begin().getUser();
106 auto connectLike = dyn_cast<FConnectLike>(op);
109 auto *srcOp = connectLike.getSrc().getDefiningOp();
110 if (!isa_and_nonnull<InvalidValueOp, ConstantOp>(srcOp))
113 if (
auto constant = dyn_cast<ConstantOp>(srcOp))
114 outputPortConstants.push_back(constant.getValue());
116 assert(isa<InvalidValueOp>(srcOp) &&
"only expect invalid");
117 outputPortConstants.push_back(std::nullopt);
123 if (srcOp->use_empty())
131 removalPortIndexes.set(index);
135 if (removalPortIndexes.none())
139 module.erasePorts(removalPortIndexes);
140 LLVM_DEBUG(llvm::for_each(removalPortIndexes.set_bits(), [&](
unsigned index) {
141 llvm::dbgs() <<
"Delete port: " << ports[index].name <<
"\n";
145 for (
auto *use : instanceGraphNode->
uses()) {
146 auto instance = ::cast<InstanceOp>(*use->getInstance());
147 ImplicitLocOpBuilder
builder(instance.getLoc(), instance);
148 unsigned outputPortIndex = 0;
149 for (
auto index : removalPortIndexes.set_bits()) {
150 auto result = instance.getResult(index);
151 assert(!ports[index].isInOut() &&
"don't expect inout ports");
155 if (ports[index].isInput()) {
156 WireOp wire =
builder.create<WireOp>(result.getType());
160 bool onlyWritten = llvm::all_of(result.getUsers(), [&](Operation *op) {
161 if (auto connect = dyn_cast<FConnectLike>(op))
162 return connect.getDest() == result;
166 result.replaceUsesWithIf(wire.getResult(), [&](OpOperand &op) ->
bool {
168 if (onlyWritten && isa<FConnectLike>(op.getOwner())) {
169 op.getOwner()->erase();
176 if (wire.use_empty())
184 auto portConstant = outputPortConstants[outputPortIndex++];
189 value =
builder.create<InvalidValueOp>(result.getType());
191 result.replaceAllUsesWith(
value);
195 instance.erasePorts(
builder, removalPortIndexes);
200 numRemovedPorts += removalPortIndexes.count();
203 std::unique_ptr<mlir::Pass>
205 auto pass = std::make_unique<RemoveUnusedPortsPass>();
206 pass->ignoreDontTouch = ignoreDontTouch;
assert(baseType &&"element must be base type")
This is a Node in the InstanceGraph.
llvm::iterator_range< UseIterator > uses()
This is an edge in the InstanceGraph.
std::unique_ptr< mlir::Pass > createRemoveUnusedPortsPass(bool ignoreDontTouch=false)
bool hasDontTouch(Value value)
Check whether a block argument ("port") or the operation defining a value has a DontTouch annotation,...
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
mlir::raw_indented_ostream & dbgs()