CIRCT  18.0.0git
SeqTypes.cpp
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1 //===- SeqTypes.cpp - Seq types code defs ---------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Implementation logic for Seq data types.
10 //
11 //===----------------------------------------------------------------------===//
12 
16 #include "mlir/IR/Builders.h"
17 #include "mlir/IR/BuiltinTypes.h"
18 #include "mlir/IR/Diagnostics.h"
19 #include "mlir/IR/DialectImplementation.h"
20 #include "mlir/IR/StorageUniquerSupport.h"
21 #include "mlir/IR/Types.h"
22 #include "llvm/ADT/StringExtras.h"
23 #include "llvm/ADT/TypeSwitch.h"
24 
25 using namespace mlir;
26 using namespace circt;
27 using namespace seq;
28 
29 //===----------------------------------------------------------------------===//
30 /// Tablegen Type Definitions
31 //===----------------------------------------------------------------------===//
32 
33 #define GET_TYPEDEF_CLASSES
34 #include "circt/Dialect/Seq/SeqTypes.cpp.inc"
35 
36 void SeqDialect::registerTypes() {
37  addTypes<
38 #define GET_TYPEDEF_LIST
39 #include "circt/Dialect/Seq/SeqTypes.cpp.inc"
40  >();
41 }
42 
43 //===----------------------------------------------------------------------===//
44 // Utilities
45 //===----------------------------------------------------------------------===//
46 
48  if (hw::type_isa<seq::ClockType>(ty))
49  return true;
50  if (hw::isHWIntegerType(ty) && hw::getBitWidth(ty) == 1)
51  return true;
52  return false;
53 }
54 
55 //===----------------------------------------------------------------------===//
56 // HLMemType
57 //===----------------------------------------------------------------------===//
58 
59 HLMemType HLMemType::cloneWith(std::optional<ArrayRef<int64_t>> shape,
60  Type elementType) const {
61  return HLMemType::get(elementType.getContext(), shape.value_or(getShape()),
62  elementType);
63 }
64 
65 llvm::SmallVector<Type> HLMemType::getAddressTypes() const {
66  auto *ctx = getContext();
67  llvm::SmallVector<Type> addressTypes;
68  for (auto dim : getShape())
69  addressTypes.push_back(IntegerType::get(ctx, llvm::Log2_64_Ceil(dim)));
70  return addressTypes;
71 }
72 
73 Type HLMemType::parse(mlir::AsmParser &odsParser) {
74  llvm::SmallVector<int64_t> shape;
75  Type elementType;
76  if (odsParser.parseLess() ||
77  odsParser.parseDimensionList(shape, /*allowDynamic=*/false,
78  /*withTrailingX=*/true) ||
79  odsParser.parseType(elementType) || odsParser.parseGreater())
80  return {};
81 
82  return HLMemType::get(odsParser.getContext(), shape, elementType);
83 }
84 
85 void HLMemType::print(AsmPrinter &odsPrinter) const {
86  odsPrinter << '<';
87  for (auto dim : getShape())
88  odsPrinter << dim << 'x';
89  odsPrinter << getElementType();
90  odsPrinter << '>';
91 }
92 
93 LogicalResult
94 HLMemType::verify(llvm::function_ref<::mlir::InFlightDiagnostic()> emitError,
95  llvm::ArrayRef<int64_t> shape, Type elementType) {
96  if (shape.empty())
97  return emitError() << "shape must have at least one dimension.";
98  return success();
99 }
MlirType elementType
Definition: CHIRRTL.cpp:25
Direction get(bool isOutput)
Returns an output direction if isOutput is true, otherwise returns an input direction.
Definition: CalyxOps.cpp:53
std::optional< int64_t > getBitWidth(FIRRTLBaseType type, bool ignoreFlip=false)
bool isHWIntegerType(mlir::Type type)
Return true if the specified type is a value HW Integer type.
Definition: HWTypes.cpp:52
bool isClockOrI1Type(Type ty)
Returns true if the type is i1 or seq.clock
Definition: SeqTypes.cpp:47
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
Definition: DebugAnalysis.h:21
Definition: seq.py:1