CIRCT  19.0.0git
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circt::calyx Namespace Reference

Namespaces

 direction
 

Classes

struct  MemoryPortsImpl
 
struct  MemoryInterface
 
class  BasicLoopInterface
 
class  LoopInterface
 
class  WhileOpInterface
 
class  RepeatOpInterface
 
class  SchedulerInterface
 Holds common utilities used for scheduling when lowering to Calyx. More...
 
class  LoopLoweringStateInterface
 
class  ComponentLoweringStateInterface
 
class  CalyxLoweringState
 An interface for conversion passes that lower Calyx programs. More...
 
class  PartialLoweringPattern
 Base class for partial lowering passes. More...
 
class  FuncOpPartialLoweringPattern
 FuncOpPartialLoweringPatterns are patterns which intend to match on FuncOps and then perform their own walking of the IR. More...
 
class  ConvertIndexTypes
 Converts all index-typed operations and values to i32 values. More...
 
struct  NonTerminatingGroupDonePattern
 GroupDoneOp's are terminator operations and should therefore be the last operator in a group. More...
 
struct  MultipleGroupDonePattern
 When building groups which contain accesses to multiple sequential components, a group_done op is created for each of these. More...
 
struct  EliminateUnusedCombGroups
 Removes calyx::CombGroupOps which are unused. More...
 
class  InlineCombGroups
 This pass recursively inlines use-def chains of combinational logic (from non-stateful groups) into groups referenced in the control schedule. More...
 
class  RewriteMemoryAccesses
 This pass rewrites memory accesses that have a width mismatch. More...
 
class  BuildBasicBlockRegs
 Builds registers for each block argument in the program. More...
 
class  BuildReturnRegs
 Builds registers for the return statement of the program and constant assignments to the component return value. More...
 
class  BuildCallInstance
 Builds instance for the calyx.invoke and calyx.group in order to initialize the instance. More...
 
class  ControlLike
 Signals that the following operation is "control-like.". More...
 
class  Combinational
 Signals that the following operation is combinational. More...
 
struct  PortInfo
 This holds information about the port for either a Component or Cell. More...
 

Typedefs

using PatternApplicationState = DenseMap< const mlir::RewritePattern *, SmallPtrSet< Operation *, 16 > >
 Extra state that is passed to all PartialLoweringPatterns so they can record when they have run on an Operation, and only run once. More...
 

Enumerations

enum  Direction { Input = 0 , Output = 1 }
 The direction of a Component or Cell port. More...
 

Functions

hw::HWModuleExternOp getExternHWModule (OpBuilder &builder, ComponentOp op)
 Returns a hw.module.extern operation describing the Verilog module which a ComponentOp eventually results in. More...
 
mlir::LogicalResult exportCalyx (mlir::ModuleOp module, llvm::raw_ostream &os)
 
void registerToCalyxTranslation ()
 
calyx::RegisterOp createRegister (Location loc, OpBuilder &builder, ComponentOp component, size_t width, Twine prefix)
 Creates a RegisterOp, with input and output port bit widths defined by width. More...
 
hw::ConstantOp createConstant (Location loc, OpBuilder &builder, ComponentOp component, size_t width, size_t value)
 A helper function to create constants in the HW dialect. More...
 
calyx::InstanceOp createInstance (Location loc, OpBuilder &builder, ComponentOp component, SmallVectorImpl< Type > &resultTypes, StringRef instanceName, StringRef componentName)
 A helper function to create calyx.instance operation. More...
 
std::string getInstanceName (mlir::func::CallOp callOp)
 A helper function to get the instance name. More...
 
bool isControlLeafNode (Operation *op)
 
DictionaryAttr getMandatoryPortAttr (MLIRContext *ctx, StringRef name)
 
void addMandatoryComponentPorts (PatternRewriter &rewriter, SmallVectorImpl< calyx::PortInfo > &ports)
 
unsigned handleZeroWidth (int64_t dim)
 
template<typename Op >
static void updateGroupAssignmentGuards (OpBuilder &builder, GroupOp &group, Op &op)
 Updates the guard of each assignment within a group with op. More...
 
void appendPortsForExternalMemref (PatternRewriter &rewriter, StringRef memName, Value memref, unsigned memoryID, SmallVectorImpl< calyx::PortInfo > &inPorts, SmallVectorImpl< calyx::PortInfo > &outPorts)
 
WalkResult getCiderSourceLocationMetadata (calyx::ComponentOp component, SmallVectorImpl< Attribute > &sourceLocations)
 
bool matchConstantOp (Operation *op, APInt &value)
 
bool singleLoadFromMemory (Value memoryReference)
 
bool noStoresToMemory (Value memoryReference)
 
Value getComponentOutput (calyx::ComponentOp compOp, unsigned outPortIdx)
 
Type convIndexType (OpBuilder &builder, Type type)
 
template<typename TGroup >
TGroup createGroup (OpBuilder &builder, calyx::ComponentOp compOp, Location loc, Twine uniqueName)
 
void buildAssignmentsForRegisterWrite (OpBuilder &builder, calyx::GroupOp groupOp, calyx::ComponentOp componentOp, calyx::RegisterOp &reg, Value inputValue)
 Creates register assignment operations within the provided groupOp. More...
 
LogicalResult applyModuleOpConversion (mlir::ModuleOp, StringRef topLevelFunction)
 Helper to update the top-level ModuleOp to set the entrypoing function. More...
 
LogicalResult verifyControlLikeOp (Operation *op)
 A helper function to verify each control-like operation has a valid parent and, if applicable, body. More...
 
LogicalResult verifyCombinationalOp (Operation *op)
 A helper function to verify a combinational operation. More...
 
LogicalResult verifyComponent (Operation *op)
 A helper function to verify each operation with the Ccomponent trait. More...
 
LogicalResult verifyCell (Operation *op)
 A helper function to verify each operation with the Cell trait. More...
 
LogicalResult verifyGroupInterface (Operation *op)
 A helper function to verify each operation with the Group Interface trait. More...
 
LogicalResult verifyIf (Operation *op)
 A helper function to verify each operation with the If trait. More...
 
PortInfo getPortInfo (BlockArgument arg)
 Returns port information for the block argument provided. More...
 
std::unique_ptr< mlir::Pass > createCompileControlPass ()
 
std::unique_ptr< mlir::Pass > createGoInsertionPass ()
 
std::unique_ptr< mlir::Pass > createRemoveCombGroupsPass ()
 
std::unique_ptr< mlir::Pass > createRemoveGroupsPass ()
 
std::unique_ptr< mlir::Pass > createClkInsertionPass ()
 
std::unique_ptr< mlir::Pass > createResetInsertionPass ()
 
std::unique_ptr< mlir::Pass > createGroupInvariantCodeMotionPass ()
 

Variables

static constexpr std::string_view goPort = "go"
 
static constexpr std::string_view donePort = "done"
 
static constexpr std::string_view resetPort = "reset"
 
static constexpr std::string_view clkPort = "clk"
 

Typedef Documentation

◆ PatternApplicationState

using circt::calyx::PatternApplicationState = typedef DenseMap<const mlir::RewritePattern *, SmallPtrSet<Operation *, 16> >

Extra state that is passed to all PartialLoweringPatterns so they can record when they have run on an Operation, and only run once.

Definition at line 523 of file CalyxLoweringUtils.h.

Enumeration Type Documentation

◆ Direction

The direction of a Component or Cell port.

this is similar to the implementation found in the FIRRTL dialect.

Enumerator
Input 
Output 

Definition at line 72 of file CalyxOps.h.

Function Documentation

◆ addMandatoryComponentPorts()

void circt::calyx::addMandatoryComponentPorts ( PatternRewriter &  rewriter,
SmallVectorImpl< calyx::PortInfo > &  ports 
)

◆ appendPortsForExternalMemref()

void circt::calyx::appendPortsForExternalMemref ( PatternRewriter &  rewriter,
StringRef  memName,
Value  memref,
unsigned  memoryID,
SmallVectorImpl< calyx::PortInfo > &  inPorts,
SmallVectorImpl< calyx::PortInfo > &  outPorts 
)

◆ applyModuleOpConversion()

LogicalResult circt::calyx::applyModuleOpConversion ( mlir::ModuleOp  moduleOp,
StringRef  topLevelFunction 
)

Helper to update the top-level ModuleOp to set the entrypoing function.

Definition at line 455 of file CalyxLoweringUtils.cpp.

References circt::calyx::direction::get().

Referenced by circt::pipelinetocalyx::LoopScheduleToCalyxPass::labelEntryPoint().

◆ buildAssignmentsForRegisterWrite()

void circt::calyx::buildAssignmentsForRegisterWrite ( OpBuilder &  builder,
calyx::GroupOp  groupOp,
calyx::ComponentOp  componentOp,
calyx::RegisterOp &  reg,
Value  inputValue 
)

◆ convIndexType()

Type circt::calyx::convIndexType ( OpBuilder &  builder,
Type  type 
)

◆ createClkInsertionPass()

std::unique_ptr< mlir::Pass > circt::calyx::createClkInsertionPass ( )

Definition at line 69 of file ClkResetInsertion.cpp.

◆ createCompileControlPass()

std::unique_ptr< mlir::Pass > circt::calyx::createCompileControlPass ( )

Definition at line 206 of file CompileControl.cpp.

◆ createConstant()

hw::ConstantOp circt::calyx::createConstant ( Location  loc,
OpBuilder &  builder,
ComponentOp  component,
size_t  width,
size_t  value 
)

◆ createGoInsertionPass()

std::unique_ptr< mlir::Pass > circt::calyx::createGoInsertionPass ( )

Definition at line 58 of file GoInsertion.cpp.

◆ createGroup()

template<typename TGroup >
TGroup circt::calyx::createGroup ( OpBuilder &  builder,
calyx::ComponentOp  compOp,
Location  loc,
Twine  uniqueName 
)

Definition at line 70 of file CalyxLoweringUtils.h.

References builder.

◆ createGroupInvariantCodeMotionPass()

std::unique_ptr< mlir::Pass > circt::calyx::createGroupInvariantCodeMotionPass ( )

Definition at line 52 of file GICM.cpp.

◆ createInstance()

calyx::InstanceOp circt::calyx::createInstance ( Location  loc,
OpBuilder &  builder,
ComponentOp  component,
SmallVectorImpl< Type > &  resultTypes,
StringRef  instanceName,
StringRef  componentName 
)

A helper function to create calyx.instance operation.

Definition at line 39 of file CalyxHelpers.cpp.

References builder.

Referenced by circt::calyx::BuildCallInstance::partiallyLowerFuncToComp(), and circt::detail::DebugInfoBuilder::visitModule().

◆ createRegister()

calyx::RegisterOp circt::calyx::createRegister ( Location  loc,
OpBuilder &  builder,
ComponentOp  component,
size_t  width,
Twine  prefix 
)

◆ createRemoveCombGroupsPass()

std::unique_ptr< mlir::Pass > circt::calyx::createRemoveCombGroupsPass ( )

Definition at line 296 of file RemoveCombGroups.cpp.

◆ createRemoveGroupsPass()

std::unique_ptr< mlir::Pass > circt::calyx::createRemoveGroupsPass ( )

Definition at line 128 of file RemoveGroups.cpp.

◆ createResetInsertionPass()

std::unique_ptr< mlir::Pass > circt::calyx::createResetInsertionPass ( )

Definition at line 73 of file ClkResetInsertion.cpp.

◆ exportCalyx()

mlir::LogicalResult circt::calyx::exportCalyx ( mlir::ModuleOp  module,
llvm::raw_ostream &  os 
)

Definition at line 1011 of file CalyxEmitter.cpp.

Referenced by registerToCalyxTranslation().

◆ getCiderSourceLocationMetadata()

WalkResult circt::calyx::getCiderSourceLocationMetadata ( calyx::ComponentOp  component,
SmallVectorImpl< Attribute > &  sourceLocations 
)

◆ getComponentOutput()

Value circt::calyx::getComponentOutput ( calyx::ComponentOp  compOp,
unsigned  outPortIdx 
)

Definition at line 132 of file CalyxLoweringUtils.cpp.

References assert().

Referenced by circt::calyx::BuildReturnRegs::partiallyLowerFuncToComp().

◆ getExternHWModule()

hw::HWModuleExternOp circt::calyx::getExternHWModule ( OpBuilder &  builder,
ComponentOp  op 
)

Returns a hw.module.extern operation describing the Verilog module which a ComponentOp eventually results in.

◆ getInstanceName()

std::string circt::calyx::getInstanceName ( mlir::func::CallOp  callOp)

A helper function to get the instance name.

Definition at line 50 of file CalyxHelpers.cpp.

Referenced by circt::scftocalyx::BuildOpGroups::buildOp(), and circt::calyx::BuildCallInstance::partiallyLowerFuncToComp().

◆ getMandatoryPortAttr()

DictionaryAttr circt::calyx::getMandatoryPortAttr ( MLIRContext *  ctx,
StringRef  name 
)

Definition at line 57 of file CalyxHelpers.cpp.

References circt::calyx::direction::get().

Referenced by addMandatoryComponentPorts().

◆ getPortInfo()

PortInfo circt::calyx::getPortInfo ( BlockArgument  arg)

Returns port information for the block argument provided.

Gets the port for a given BlockArgument.

Definition at line 141 of file CalyxOps.cpp.

References assert().

Referenced by verifyPortDirection().

◆ handleZeroWidth()

unsigned circt::calyx::handleZeroWidth ( int64_t  dim)

◆ isControlLeafNode()

bool circt::calyx::isControlLeafNode ( Operation *  op)

Definition at line 55 of file CalyxHelpers.cpp.

Referenced by getCiderSourceLocationMetadata().

◆ matchConstantOp()

bool circt::calyx::matchConstantOp ( Operation *  op,
APInt &  value 
)

◆ noStoresToMemory()

bool circt::calyx::noStoresToMemory ( Value  memoryReference)

◆ registerToCalyxTranslation()

void circt::calyx::registerToCalyxTranslation ( )

Definition at line 1021 of file CalyxEmitter.cpp.

References exportCalyx().

Referenced by circt::registerAllTranslations().

◆ singleLoadFromMemory()

bool circt::calyx::singleLoadFromMemory ( Value  memoryReference)

◆ updateGroupAssignmentGuards()

template<typename Op >
static void circt::calyx::updateGroupAssignmentGuards ( OpBuilder &  builder,
GroupOp &  group,
Op &  op 
)
static

Updates the guard of each assignment within a group with op.

Definition at line 67 of file CalyxHelpers.h.

References builder.

Referenced by modifyGroupOperations().

◆ verifyCell()

LogicalResult circt::calyx::verifyCell ( Operation *  op)

A helper function to verify each operation with the Cell trait.

Definition at line 210 of file CalyxOps.cpp.

◆ verifyCombinationalOp()

LogicalResult circt::calyx::verifyCombinationalOp ( Operation *  op)

A helper function to verify a combinational operation.

◆ verifyComponent()

LogicalResult circt::calyx::verifyComponent ( Operation *  op)

A helper function to verify each operation with the Ccomponent trait.

Definition at line 202 of file CalyxOps.cpp.

◆ verifyControlLikeOp()

LogicalResult circt::calyx::verifyControlLikeOp ( Operation *  op)

A helper function to verify each control-like operation has a valid parent and, if applicable, body.

Definition at line 218 of file CalyxOps.cpp.

References hasControlRegion(), and verifyControlBody().

Referenced by circt::calyx::ControlLike< ConcreteType >::verifyTrait().

◆ verifyGroupInterface()

LogicalResult circt::calyx::verifyGroupInterface ( Operation *  op)

A helper function to verify each operation with the Group Interface trait.

Definition at line 1389 of file CalyxOps.cpp.

References verifyPrimitivePortDriving().

◆ verifyIf()

LogicalResult circt::calyx::verifyIf ( Operation *  op)

A helper function to verify each operation with the If trait.

Definition at line 255 of file CalyxOps.cpp.

Variable Documentation

◆ clkPort

constexpr std::string_view circt::calyx::clkPort = "clk"
staticconstexpr

Definition at line 34 of file CalyxOps.h.

Referenced by addMandatoryComponentPorts(), and hasRequiredPorts().

◆ donePort

constexpr std::string_view circt::calyx::donePort = "done"
staticconstexpr

◆ goPort

constexpr std::string_view circt::calyx::goPort = "go"
staticconstexpr

◆ resetPort

constexpr std::string_view circt::calyx::resetPort = "reset"
staticconstexpr