CIRCT  19.0.0git
FIRRTLFieldSource.h
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1 //===- FIRRTLFieldSource.h - Field Source (points-to) -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the FIRRTL Field Source Analysis, which is a points-to
10 // analysis which identifies the source field and storage of any value derived
11 // from a storage location. Values derived from reads of storage locations do
12 // not appear in this analysis.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef CIRCT_DIALECT_FIRRTL_FIRRTLFIELDSOURCE_H
17 #define CIRCT_DIALECT_FIRRTL_FIRRTLFIELDSOURCE_H
18 
20 #include "circt/Support/LLVM.h"
21 
22 namespace circt {
23 namespace firrtl {
24 
25 /// To use this class, retrieve a cached copy from the analysis manager:
26 /// auto &fieldsource = getAnalysis<FieldSource>(getOperation());
27 class FieldSource {
28 
29 public:
30  explicit FieldSource(Operation *operation);
31 
32  struct PathNode {
33  PathNode(Value src, ArrayRef<int64_t> ar, Flow flow)
34  : src(src), flow(flow), path(ar) {}
35  Value src;
37  SmallVector<int64_t, 4> path;
38 
39  /// Roots are operations which define the storage or aggregate value.
40  bool isRoot() const { return path.empty(); }
41 
42  /// Writable sources can appear as a LHS of a connect given this node's
43  /// path.
44  bool isSrcWritable() const { return flow != Flow::Source; }
45 
46  /// Transparent sources reflect a value written to them in the same cycle it
47  /// is written. These are sources which provide dataflow backwards in SSA
48  /// during one logical execution of a module body.
49  /// A port may be transparent (no storage), but not be writable from the
50  /// side of the instance we are on.
51  bool isSrcTransparent() const {
52  // ports are wires
53  if (!src.getDefiningOp())
54  return true;
55  // ports are wires, on this side of the instance too.
56  return isa<WireOp, InstanceOp>(src.getDefiningOp());
57  }
58  };
59 
60  const PathNode *nodeForValue(Value v) const;
61 
62 private:
63  void visitOp(Operation *op);
64  void visitSubfield(SubfieldOp sf);
65  void visitOpenSubfield(OpenSubfieldOp sf);
66  void visitSubindex(SubindexOp si);
67  void visitOpenSubindex(OpenSubindexOp si);
68  void visitSubaccess(SubaccessOp sa);
69  void visitMem(MemOp mem);
70  void visitInst(InstanceOp inst);
71  void visitInstChoice(InstanceChoiceOp inst);
72 
73  void makeNodeForValue(Value dst, Value src, ArrayRef<int64_t> path,
74  Flow flow);
75 
76  DenseMap<Value, PathNode> paths;
77 };
78 
79 } // namespace firrtl
80 } // namespace circt
81 
82 #endif // CIRCT_DIALECT_FIRRTL_FIRRTLFIELDSOURCE_H
To use this class, retrieve a cached copy from the analysis manager: auto &fieldsource = getAnalysis<...
const PathNode * nodeForValue(Value v) const
void visitSubaccess(SubaccessOp sa)
void visitOpenSubfield(OpenSubfieldOp sf)
DenseMap< Value, PathNode > paths
void visitInstChoice(InstanceChoiceOp inst)
void visitSubfield(SubfieldOp sf)
FieldSource(Operation *operation)
void visitInst(InstanceOp inst)
void visitOpenSubindex(OpenSubindexOp si)
void makeNodeForValue(Value dst, Value src, ArrayRef< int64_t > path, Flow flow)
void visitSubindex(SubindexOp si)
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
Definition: DebugAnalysis.h:21
PathNode(Value src, ArrayRef< int64_t > ar, Flow flow)
bool isSrcWritable() const
Writable sources can appear as a LHS of a connect given this node's path.
bool isRoot() const
Roots are operations which define the storage or aggregate value.
bool isSrcTransparent() const
Transparent sources reflect a value written to them in the same cycle it is written.