9 #include "mlir/CAPI/IR.h"
10 #include "mlir/CAPI/Registration.h"
11 #include "mlir/CAPI/Support.h"
13 using namespace circt;
14 using namespace firrtl;
21 circt::firrtl::FIRRTLDialect)
53 assert(baseType &&
"element must be base type");
60 SmallVector<BundleType::BundleElement, 4> bundleFields;
61 bundleFields.reserve(count);
63 for (
size_t i = 0; i < count; i++) {
64 auto field = fields[i];
67 assert(baseType &&
"field must be base type");
69 bundleFields.emplace_back(
unwrap(field.name), field.isFlip, baseType);
84 value = Convention::Internal;
87 value = Convention::Scalarized;
97 static_cast<std::underlying_type_t<Direction>
>(
Direction::In));
104 unwrap(ctx), ArrayRef(
reinterpret_cast<const Direction *
>(dirs), count)));
108 MlirType type, MlirAttribute
value) {
118 value = NameKindEnum::DroppableName;
121 value = NameKindEnum::InterestingName;
133 value = RUWAttr::Undefined;
136 value = RUWAttr::Old;
139 value = RUWAttr::New;
147 bool isBinary,
bool isInline) {
157 value = MemDirAttr::Infer;
160 value = MemDirAttr::Read;
163 value = MemDirAttr::Write;
166 value = MemDirAttr::ReadWrite;
177 switch (eventControl) {
179 value = EventControl::AtPosEdge;
182 value = EventControl::AtNegEdge;
185 value = EventControl::AtEdge;
assert(baseType &&"element must be base type")
return wrap(CMemoryType::get(unwrap(ctx), baseType, numElements))
MlirAttribute firrtlAttrGetMemDir(MlirContext ctx, FIRRTLMemDir dir)
MlirType firrtlTypeGetAsyncReset(MlirContext ctx)
MlirType firrtlTypeGetAnalog(MlirContext ctx, int32_t width)
MlirAttribute firrtlAttrGetConvention(MlirContext ctx, FIRRTLConvention convention)
MlirType firrtlTypeGetClock(MlirContext ctx)
MlirType firrtlTypeGetReset(MlirContext ctx)
MlirType firrtlTypeGetVector(MlirContext ctx, MlirType element, size_t count)
MlirType firrtlTypeGetSInt(MlirContext ctx, int32_t width)
MlirType firrtlTypeGetBundle(MlirContext ctx, size_t count, const FIRRTLBundleField *fields)
MlirAttribute firrtlAttrGetEventControl(MlirContext ctx, FIRRTLEventControl eventControl)
MlirAttribute firrtlAttrGetParamDecl(MlirContext ctx, MlirIdentifier name, MlirType type, MlirAttribute value)
MlirAttribute firrtlAttrGetMemInit(MlirContext ctx, MlirIdentifier filename, bool isBinary, bool isInline)
MLIR_DEFINE_CAPI_DIALECT_REGISTRATION(FIRRTL, firrtl, circt::firrtl::FIRRTLDialect) MlirType firrtlTypeGetUInt(MlirContext ctx
MlirAttribute firrtlAttrGetRUW(MlirContext ctx, FIRRTLRUW ruw)
MlirAttribute firrtlAttrGetNameKind(MlirContext ctx, FIRRTLNameKind nameKind)
MlirAttribute firrtlAttrGetPortDirs(MlirContext ctx, size_t count, const FIRRTLPortDir *dirs)
@ FIRRTL_NAME_KIND_DROPPABLE_NAME
@ FIRRTL_NAME_KIND_INTERESTING_NAME
@ FIRRTL_MEM_DIR_READ_WRITE
MLIR_CAPI_EXPORTED MlirType firrtlTypeGetUInt(MlirContext ctx, int32_t width)
@ FIRRTL_EVENT_CONTROL_AT_POS_EDGE
@ FIRRTL_EVENT_CONTROL_AT_NEG_EDGE
@ FIRRTL_EVENT_CONTROL_AT_EDGE
@ FIRRTL_CONVENTION_SCALARIZED
@ FIRRTL_CONVENTION_INTERNAL
static EvaluatorValuePtr unwrap(OMEvaluatorValue c)
Direction get(bool isOutput)
Returns an output direction if isOutput is true, otherwise returns an input direction.
IntegerAttr packAttribute(MLIRContext *context, ArrayRef< Direction > directions)
Return a IntegerAttr containing the packed representation of an array of directions.
Direction
This represents the direction of a single port.
This file defines an intermediate representation for circuits acting as an abstraction for constraint...