CIRCT 22.0.0git
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FIRRTLOpInterfaces.h
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1//===- FIRRTLOpInterfaces.h - Declare FIRRTL op interfaces ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the operation interfaces for the FIRRTL IR and supporting
10// types.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef CIRCT_DIALECT_FIRRTL_OP_INTERFACES_H
15#define CIRCT_DIALECT_FIRRTL_OP_INTERFACES_H
16
22#include "mlir/IR/Attributes.h"
23#include "mlir/IR/BuiltinTypes.h"
24#include "mlir/IR/OpDefinition.h"
25#include "mlir/IR/SymbolTable.h"
26#include "llvm/ADT/TypeSwitch.h"
27
28namespace mlir {
29class PatternRewriter;
30} // end namespace mlir
31
32namespace circt {
33namespace firrtl {
34
35class FIRRTLType;
36class Forceable;
37class ClassLike;
38class ClassType;
39
40/// This holds the name and type that describes the module's ports.
41struct PortInfo {
42 StringAttr name;
43 Type type;
45 hw::InnerSymAttr sym = {};
46 Location loc = UnknownLoc::get(type.getContext());
48 Attribute domains;
49
50 StringRef getName() const { return name ? name.getValue() : ""; }
51
52 /// Return true if this is a simple output-only port. If you want the
53 /// direction of the port, use the \p direction parameter.
54 bool isOutput() const { return direction == Direction::Out && !isInOut(); }
55
56 /// Return true if this is a simple input-only port. If you want the
57 /// direction of the port, use the \p direction parameter.
58 bool isInput() const { return direction == Direction::In && !isInOut(); }
59
60 /// Return true if this is an inout port. This will be true if the port
61 /// contains either bi-directional signals or analog types.
62 /// Non-HW types (e.g., ref types) are never considered InOut.
63 bool isInOut() const { return isTypeInOut(type); }
64
65 /// Default constructors
66 PortInfo(StringAttr name, Type type, Direction dir, StringAttr symName = {},
67 std::optional<Location> location = {},
68 std::optional<AnnotationSet> annos = {},
69 std::optional<Attribute> domains = {})
70 : name(name), type(type), direction(dir) {
71 if (symName)
72 sym = hw::InnerSymAttr::get(symName);
73 if (location)
74 loc = *location;
75 if (annos)
76 annotations = *annos;
77 if (domains)
78 this->domains = *domains;
79 };
80 PortInfo(StringAttr name, Type type, Direction dir, hw::InnerSymAttr sym,
81 Location loc, AnnotationSet annos, Attribute domains)
82 : name(name), type(type), direction(dir), sym(sym), loc(loc),
83 annotations(annos), domains(domains) {}
84};
85
87 /// Classic FIRRTL connections: last connect 'wins' across paths;
88 /// conditionally applied under 'when'.
90 /// Exclusive connection to the destination, unconditional.
92};
93
94/// Verification hook for verifying module like operations.
95LogicalResult verifyModuleLikeOpInterface(FModuleLike module);
96
97namespace detail {
98/// Return null or forceable reference result type.
99RefType getForceableResultType(bool forceable, Type type);
100/// Verify a Forceable op.
101LogicalResult verifyForceableOp(Forceable op);
102/// Replace a Forceable op with equivalent, changing whether forceable.
103/// No-op if already has specified forceability.
104Forceable
105replaceWithNewForceability(Forceable op, bool forceable,
106 ::mlir::PatternRewriter *rewriter = nullptr);
107} // end namespace detail
108
109//===----------------------------------------------------------------------===//
110// ClassLike Helpers
111//===----------------------------------------------------------------------===//
112
113namespace detail {
114ClassType getInstanceTypeForClassLike(ClassLike classOp);
115
116/// Assuming that the classOp is the source of truth, verify that the type
117/// accurately matches the signature of the class.
118LogicalResult
119verifyTypeAgainstClassLike(ClassLike classOp, ClassType type,
120 function_ref<InFlightDiagnostic()> emitError);
121} // namespace detail
122
123} // namespace firrtl
124} // namespace circt
125
126#include "circt/Dialect/FIRRTL/FIRRTLOpInterfaces.h.inc"
127#endif // CIRCT_DIALECT_FIRRTL_OP_INTERFACES_H
This class provides a read-only projection over the MLIR attributes that represent a set of annotatio...
ClassType getInstanceTypeForClassLike(ClassLike classOp)
LogicalResult verifyForceableOp(Forceable op)
Verify a Forceable op.
LogicalResult verifyTypeAgainstClassLike(ClassLike classOp, ClassType type, function_ref< InFlightDiagnostic()> emitError)
Assuming that the classOp is the source of truth, verify that the type accurately matches the signatu...
Forceable replaceWithNewForceability(Forceable op, bool forceable, ::mlir::PatternRewriter *rewriter=nullptr)
Replace a Forceable op with equivalent, changing whether forceable.
RefType getForceableResultType(bool forceable, Type type)
Return null or forceable reference result type.
Direction
This represents the direction of a single port.
LogicalResult verifyModuleLikeOpInterface(FModuleLike module)
Verification hook for verifying module like operations.
@ LastConnect
Classic FIRRTL connections: last connect 'wins' across paths; conditionally applied under 'when'.
@ StaticSingleConnect
Exclusive connection to the destination, unconditional.
bool isTypeInOut(mlir::Type type)
Returns true if the given type has some flipped (aka unaligned) dataflow.
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
This holds the name and type that describes the module's ports.
bool isOutput() const
Return true if this is a simple output-only port.
PortInfo(StringAttr name, Type type, Direction dir, StringAttr symName={}, std::optional< Location > location={}, std::optional< AnnotationSet > annos={}, std::optional< Attribute > domains={})
Default constructors.
PortInfo(StringAttr name, Type type, Direction dir, hw::InnerSymAttr sym, Location loc, AnnotationSet annos, Attribute domains)
bool isInput() const
Return true if this is a simple input-only port.
bool isInOut() const
Return true if this is an inout port.