CIRCT  18.0.0git
LTLOps.cpp
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1 //===- LTLOps.cpp ==-------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
11 #include "mlir/IR/Builders.h"
12 #include "mlir/IR/OpImplementation.h"
13 #include "mlir/IR/PatternMatch.h"
14 #include "mlir/IR/SymbolTable.h"
15 #include "mlir/Interfaces/FunctionImplementation.h"
16 #include "mlir/Interfaces/SideEffectInterfaces.h"
17 
18 using namespace circt;
19 using namespace ltl;
20 using namespace mlir;
21 
22 #define GET_OP_CLASSES
23 #include "circt/Dialect/LTL/LTL.cpp.inc"
24 
25 //===----------------------------------------------------------------------===//
26 // AndOp / OrOp
27 //===----------------------------------------------------------------------===//
28 
29 static LogicalResult inferAndLikeReturnTypes(MLIRContext *context,
30  ValueRange operands,
31  SmallVectorImpl<Type> &results) {
32  if (llvm::any_of(operands, [](auto operand) {
33  return isa<PropertyType>(operand.getType());
34  })) {
35  results.push_back(PropertyType::get(context));
36  } else {
37 
38  results.push_back(SequenceType::get(context));
39  }
40  return success();
41 }
42 
43 LogicalResult
44 AndOp::inferReturnTypes(MLIRContext *context, std::optional<Location> loc,
45  ValueRange operands, DictionaryAttr attributes,
46  OpaqueProperties properties, RegionRange regions,
47  SmallVectorImpl<Type> &inferredReturnTypes) {
48  return inferAndLikeReturnTypes(context, operands, inferredReturnTypes);
49 }
50 
51 LogicalResult
52 OrOp::inferReturnTypes(MLIRContext *context, std::optional<Location> loc,
53  ValueRange operands, DictionaryAttr attributes,
54  OpaqueProperties properties, RegionRange regions,
55  SmallVectorImpl<Type> &inferredReturnTypes) {
56  return inferAndLikeReturnTypes(context, operands, inferredReturnTypes);
57 }
58 
59 //===----------------------------------------------------------------------===//
60 // ClockOp
61 //===----------------------------------------------------------------------===//
62 
63 LogicalResult
64 ClockOp::inferReturnTypes(MLIRContext *context, std::optional<Location> loc,
65  ValueRange operands, DictionaryAttr attributes,
66  OpaqueProperties properties, RegionRange regions,
67  SmallVectorImpl<Type> &inferredReturnTypes) {
68  if (isa<PropertyType>(operands[0].getType())) {
69  inferredReturnTypes.push_back(PropertyType::get(context));
70  } else {
71  inferredReturnTypes.push_back(SequenceType::get(context));
72  }
73  return success();
74 }
static LogicalResult inferAndLikeReturnTypes(MLIRContext *context, ValueRange operands, SmallVectorImpl< Type > &results)
Definition: LTLOps.cpp:29
Direction get(bool isOutput)
Returns an output direction if isOutput is true, otherwise returns an input direction.
Definition: CalyxOps.cpp:53
LogicalResult inferReturnTypes(MLIRContext *context, std::optional< Location > loc, ValueRange operands, DictionaryAttr attrs, mlir::OpaqueProperties properties, mlir::RegionRange regions, SmallVectorImpl< Type > &results, llvm::function_ref< FIRRTLType(ValueRange, ArrayRef< NamedAttribute >, std::optional< Location >)> callback)
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
Definition: DebugAnalysis.h:21
Definition: ltl.py:1