CIRCT  19.0.0git
Firtool.h
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1 //===- Firtool.h - Definitions for the firtool pipeline setup ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This library parses options for firtool and sets up its pipeline.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef CIRCT_FIRTOOL_FIRTOOL_H
14 #define CIRCT_FIRTOOL_FIRTOOL_H
15 
18 #include "circt/Support/LLVM.h"
19 #include "mlir/Pass/PassManager.h"
20 #include "llvm/Support/CommandLine.h"
21 
22 namespace circt {
23 namespace firtool {
24 //===----------------------------------------------------------------------===//
25 // FirtoolOptions
26 //===----------------------------------------------------------------------===//
27 
28 /// Set of options used to control the behavior of the firtool pipeline.
30 public:
32 
33  // Helper Types
35  enum class RandomKind { None, Mem, Reg, All };
36 
37  bool isRandomEnabled(RandomKind kind) const {
38  return disableRandom != RandomKind::All && disableRandom != kind;
39  }
40 
42  switch (buildMode) {
43  case BuildModeDebug:
45  case BuildModeRelease:
47  case BuildModeDefault:
48  return preserveMode;
49  }
50  llvm_unreachable("unknown build mode");
51  }
52 
53  StringRef getOutputFilename() const { return outputFilename; }
54  StringRef getOmirOutputFile() const { return omirOutFile; }
55  StringRef getBlackBoxRootPath() const { return blackBoxRootPath; }
58  }
59  StringRef getReplaceSequentialMemoriesFile() const { return replSeqMemFile; }
60  StringRef getOutputAnnotationFilename() const {
62  }
63 
65  return preserveAggregate;
66  }
68 
69  seq::ExternalizeClockGateOptions getClockGateOptions() const {
72  }
73 
74  FirtoolOptions &setClockGateOptions(seq::ExternalizeClockGateOptions &opts) {
75  ckgModuleName = opts.moduleName;
76  ckgInputName = opts.inputName;
77  ckgOutputName = opts.outputName;
78  ckgEnableName = opts.enableName;
79  ckgTestEnableName = opts.testEnableName;
80  ckgInstName = opts.instName;
81  return *this;
82  }
83 
84  bool isDefaultOutputFilename() const { return outputFilename == "-"; }
87  }
90  }
93  }
96  bool shouldLowerMemories() const { return lowerMemories; }
97  bool shouldDedup() const { return !noDedup; }
98  bool shouldRunWireDFT() const { return runWireDFT; }
99  bool shouldEnableDebugInfo() const { return enableDebugInfo; }
101  bool shouldEmitOMIR() const { return emitOMIR; }
105  }
106  bool shouldConvertVecOfBundle() const { return vbToBV; }
109  }
112  }
115  }
116  bool shouldStripDebugInfo() const { return stripDebugInfo; }
121  }
126  }
127  bool shouldAddMuxPragmas() const { return addMuxPragmas; }
130  }
131  bool shouldExtractTestCode() const { return extractTestCode; }
132  bool shouldFixupEICGWrapper() const { return fixupEICGWrapper; }
133 
134  // Setters, used by the CAPI
136  outputFilename = name;
137  return *this;
138  }
139 
141  disableAnnotationsUnknown = disable;
142  return *this;
143  }
144 
147  return *this;
148  }
149 
152  return *this;
153  }
154 
157  preserveAggregate = value;
158  return *this;
159  }
160 
163  preserveMode = value;
164  return *this;
165  }
166 
168  enableDebugInfo = value;
169  return *this;
170  }
171 
173  buildMode = value;
174  return *this;
175  }
176 
178  disableOptimization = value;
179  return *this;
180  }
181 
183  exportChiselInterface = value;
184  return *this;
185  }
186 
189  return *this;
190  }
191 
192  FirtoolOptions &setVbToBV(bool value) {
193  vbToBV = value;
194  return *this;
195  }
196 
197  FirtoolOptions &setNoDedup(bool value) {
198  noDedup = value;
199  return *this;
200  }
201 
203  companionMode = value;
204  return *this;
205  }
206 
209  return *this;
210  }
211 
214  return *this;
215  }
216 
218  emitOMIR = value;
219  return *this;
220  }
221 
222  FirtoolOptions &setOmirOutFile(StringRef value) {
223  omirOutFile = value;
224  return *this;
225  }
226 
228  lowerMemories = value;
229  return *this;
230  }
231 
233  blackBoxRootPath = value;
234  return *this;
235  }
236 
238  replSeqMem = value;
239  return *this;
240  }
241 
242  FirtoolOptions &setReplSeqMemFile(StringRef value) {
243  replSeqMemFile = value;
244  return *this;
245  }
246 
248  extractTestCode = value;
249  return *this;
250  }
251 
253  ignoreReadEnableMem = value;
254  return *this;
255  }
256 
258  disableRandom = value;
259  return *this;
260  }
261 
263  outputAnnotationFilename = value;
264  return *this;
265  }
266 
268  enableAnnotationWarning = value;
269  return *this;
270  }
271 
273  addMuxPragmas = value;
274  return *this;
275  }
276 
278  emitChiselAssertsAsSVA = value;
279  return *this;
280  }
281 
283  emitSeparateAlwaysBlocks = value;
284  return *this;
285  }
286 
289  return *this;
290  }
291 
294  return *this;
295  }
296 
298  etcDisableModuleInlining = value;
299  return *this;
300  }
301 
305  return *this;
306  }
307 
308  FirtoolOptions &setCkgModuleName(StringRef value) {
309  ckgModuleName = value;
310  return *this;
311  }
312 
313  FirtoolOptions &setCkgInputName(StringRef value) {
314  ckgInputName = value;
315  return *this;
316  }
317 
318  FirtoolOptions &setCkgOutputName(StringRef value) {
319  ckgOutputName = value;
320  return *this;
321  }
322 
323  FirtoolOptions &setCkgEnableName(StringRef value) {
324  ckgEnableName = value;
325  return *this;
326  }
327 
329  ckgTestEnableName = value;
330  return *this;
331  }
332 
334  exportModuleHierarchy = value;
335  return *this;
336  }
337 
339  stripFirDebugInfo = value;
340  return *this;
341  }
342 
344  stripDebugInfo = value;
345  return *this;
346  }
347 
349  fixupEICGWrapper = value;
350  return *this;
351  }
352 
353 private:
354  std::string outputFilename;
365  bool vbToBV;
366  bool noDedup;
371  bool emitOMIR;
372  std::string omirOutFile;
374  std::string blackBoxRootPath;
376  std::string replSeqMemFile;
389  std::string ckgModuleName;
390  std::string ckgInputName;
391  std::string ckgOutputName;
392  std::string ckgEnableName;
393  std::string ckgTestEnableName;
394  std::string ckgInstName;
399 };
400 
402 
403 LogicalResult populatePreprocessTransforms(mlir::PassManager &pm,
404  const FirtoolOptions &opt);
405 
406 LogicalResult populateCHIRRTLToLowFIRRTL(mlir::PassManager &pm,
407  const FirtoolOptions &opt,
408  StringRef inputFilename);
409 
410 LogicalResult populateLowFIRRTLToHW(mlir::PassManager &pm,
411  const FirtoolOptions &opt);
412 
413 LogicalResult populateHWToSV(mlir::PassManager &pm, const FirtoolOptions &opt);
414 
415 LogicalResult populateExportVerilog(mlir::PassManager &pm,
416  const FirtoolOptions &opt,
417  std::unique_ptr<llvm::raw_ostream> os);
418 
419 LogicalResult populateExportVerilog(mlir::PassManager &pm,
420  const FirtoolOptions &opt,
421  llvm::raw_ostream &os);
422 
423 LogicalResult populateExportSplitVerilog(mlir::PassManager &pm,
424  const FirtoolOptions &opt,
425  llvm::StringRef directory);
426 
427 LogicalResult populateFinalizeIR(mlir::PassManager &pm,
428  const FirtoolOptions &opt);
429 
430 } // namespace firtool
431 } // namespace circt
432 
433 #endif // CIRCT_FIRTOOL_FIRTOOL_H
Set of options used to control the behavior of the firtool pipeline.
Definition: Firtool.h:29
FirtoolOptions & setCkgTestEnableName(StringRef value)
Definition: Firtool.h:328
FirtoolOptions & setOutputFilename(StringRef name)
Definition: Firtool.h:135
FirtoolOptions & setCkgModuleName(StringRef value)
Definition: Firtool.h:308
bool shouldStripDebugInfo() const
Definition: Firtool.h:116
FirtoolOptions & setChiselInterfaceOutDirectory(StringRef value)
Definition: Firtool.h:187
FirtoolOptions & setIgnoreReadEnableMem(bool value)
Definition: Firtool.h:252
firrtl::PreserveAggregate::PreserveMode getPreserveAggregate() const
Definition: Firtool.h:64
FirtoolOptions & setLowerAnnotationsNoRefTypePorts(bool value)
Definition: Firtool.h:150
bool shouldAddVivadoRAMAddressConflictSynthesisBugWorkaround() const
Definition: Firtool.h:128
firrtl::PreserveValues::PreserveMode preserveMode
Definition: Firtool.h:359
FirtoolOptions & setExportChiselInterface(bool value)
Definition: Firtool.h:182
StringRef getOmirOutputFile() const
Definition: Firtool.h:54
bool isDefaultOutputFilename() const
Definition: Firtool.h:84
FirtoolOptions & setFixupEICGWrapper(bool value)
Definition: Firtool.h:348
StringRef getOutputFilename() const
Definition: Firtool.h:53
bool shouldDisableAggressiveMergeConnections() const
Definition: Firtool.h:119
FirtoolOptions & setDisableUnknownAnnotations(bool disable)
Definition: Firtool.h:140
StringRef getReplaceSequentialMemoriesFile() const
Definition: Firtool.h:59
FirtoolOptions & setPreserveAggregate(firrtl::PreserveAggregate::PreserveMode value)
Definition: Firtool.h:156
bool shouldDisableHoistingHWPassthrough() const
Definition: Firtool.h:103
bool addVivadoRAMAddressConflictSynthesisBugWorkaround
Definition: Firtool.h:388
FirtoolOptions & setCkgEnableName(StringRef value)
Definition: Firtool.h:323
FirtoolOptions & setReplSeqMemFile(StringRef value)
Definition: Firtool.h:242
bool shouldExportChiselInterface() const
Definition: Firtool.h:102
bool shouldExtractTestCode() const
Definition: Firtool.h:131
FirtoolOptions & setEtcDisableModuleInlining(bool value)
Definition: Firtool.h:297
std::string chiselInterfaceOutDirectory
Definition: Firtool.h:364
bool shouldFixupEICGWrapper() const
Definition: Firtool.h:132
firrtl::PreserveValues::PreserveMode getPreserveMode() const
Definition: Firtool.h:41
StringRef getBlackBoxRootPath() const
Definition: Firtool.h:55
bool shouldDisableOptimization() const
Definition: Firtool.h:95
FirtoolOptions & setCkgOutputName(StringRef value)
Definition: Firtool.h:318
FirtoolOptions & setExtractTestCode(bool value)
Definition: Firtool.h:247
firrtl::CompanionMode getCompanionMode() const
Definition: Firtool.h:67
FirtoolOptions & setOmirOutFile(StringRef value)
Definition: Firtool.h:222
bool shouldDisableClasslessAnnotations() const
Definition: Firtool.h:88
bool shouldEmitChiselAssertsAsSVA() const
Definition: Firtool.h:123
FirtoolOptions & setEtcDisableInstanceExtraction(bool value)
Definition: Firtool.h:287
FirtoolOptions & setStripDebugInfo(bool value)
Definition: Firtool.h:343
bool shouldIgnoreReadEnableMemories() const
Definition: Firtool.h:100
FirtoolOptions & setVbToBV(bool value)
Definition: Firtool.h:192
FirtoolOptions & setDisableAnnotationsClassless(bool value)
Definition: Firtool.h:145
FirtoolOptions & setLowerMemories(bool value)
Definition: Firtool.h:227
bool isRandomEnabled(RandomKind kind) const
Definition: Firtool.h:37
FirtoolOptions & setReplSeqMem(bool value)
Definition: Firtool.h:237
bool shouldDisableUnknownAnnotations() const
Definition: Firtool.h:85
FirtoolOptions & setDisableRandom(RandomKind value)
Definition: Firtool.h:257
bool shouldAddMuxPragmas() const
Definition: Firtool.h:127
bool shouldEnableAnnotationWarning() const
Definition: Firtool.h:122
bool shouldReplicateSequentialMemories() const
Definition: Firtool.h:94
bool shouldEtcDisableInstanceExtraction() const
Definition: Firtool.h:107
bool shouldConvertVecOfBundle() const
Definition: Firtool.h:106
FirtoolOptions & setEmitOMIR(bool value)
Definition: Firtool.h:217
StringRef getOutputAnnotationFilename() const
Definition: Firtool.h:60
FirtoolOptions & setCompanionMode(firrtl::CompanionMode value)
Definition: Firtool.h:202
bool shouldStripFirDebugInfo() const
Definition: Firtool.h:117
bool shouldEtcDisableRegisterExtraction() const
Definition: Firtool.h:110
FirtoolOptions & setBuildMode(BuildMode value)
Definition: Firtool.h:172
std::string outputAnnotationFilename
Definition: Firtool.h:380
FirtoolOptions & setNoDedup(bool value)
Definition: Firtool.h:197
firrtl::PreserveAggregate::PreserveMode preserveAggregate
Definition: Firtool.h:358
bool shouldLowerMemories() const
Definition: Firtool.h:96
FirtoolOptions & setClockGateOptions(seq::ExternalizeClockGateOptions &opts)
Definition: Firtool.h:74
bool shouldEtcDisableModuleInlining() const
Definition: Firtool.h:113
FirtoolOptions & setAddVivadoRAMAddressConflictSynthesisBugWorkaround(bool value)
Definition: Firtool.h:303
FirtoolOptions & setDisableHoistingHWPassthrough(bool value)
Definition: Firtool.h:212
FirtoolOptions & setEnableDebugInfo(bool value)
Definition: Firtool.h:167
FirtoolOptions & setEmitSeparateAlwaysBlocks(bool value)
Definition: Firtool.h:282
bool shouldLowerNoRefTypePortAnnotations() const
Definition: Firtool.h:91
bool shouldExportModuleHierarchy() const
Definition: Firtool.h:118
FirtoolOptions & setPreserveValues(firrtl::PreserveValues::PreserveMode value)
Definition: Firtool.h:162
firrtl::CompanionMode companionMode
Definition: Firtool.h:368
FirtoolOptions & setCkgInputName(StringRef value)
Definition: Firtool.h:313
FirtoolOptions & setStripFirDebugInfo(bool value)
Definition: Firtool.h:338
FirtoolOptions & setOutputAnnotationFilename(StringRef value)
Definition: Firtool.h:262
FirtoolOptions & setEnableAnnotationWarning(bool value)
Definition: Firtool.h:267
FirtoolOptions & setBlackBoxRootPath(StringRef value)
Definition: Firtool.h:232
FirtoolOptions & setDisableAggressiveMergeConnections(bool value)
Definition: Firtool.h:207
bool shouldRunWireDFT() const
Definition: Firtool.h:98
FirtoolOptions & setAddMuxPragmas(bool value)
Definition: Firtool.h:272
seq::ExternalizeClockGateOptions getClockGateOptions() const
Definition: Firtool.h:69
bool shouldEnableDebugInfo() const
Definition: Firtool.h:99
bool shouldEmitSeparateAlwaysBlocks() const
Definition: Firtool.h:124
FirtoolOptions & setDisableOptimization(bool value)
Definition: Firtool.h:177
FirtoolOptions & setEmitChiselAssertsAsSVA(bool value)
Definition: Firtool.h:277
FirtoolOptions & setEtcDisableRegisterExtraction(bool value)
Definition: Firtool.h:292
StringRef getChiselInterfaceOutputDirectory() const
Definition: Firtool.h:56
FirtoolOptions & setExportModuleHierarchy(bool value)
Definition: Firtool.h:333
@ None
Don't explicitly preserve any named values.
Definition: Passes.h:159
LogicalResult populateExportSplitVerilog(mlir::PassManager &pm, const FirtoolOptions &opt, llvm::StringRef directory)
Definition: Firtool.cpp:364
LogicalResult populateHWToSV(mlir::PassManager &pm, const FirtoolOptions &opt)
Definition: Firtool.cpp:263
LogicalResult populateLowFIRRTLToHW(mlir::PassManager &pm, const FirtoolOptions &opt)
Definition: Firtool.cpp:230
LogicalResult populateExportVerilog(mlir::PassManager &pm, const FirtoolOptions &opt, std::unique_ptr< llvm::raw_ostream > os)
Definition: Firtool.cpp:345
LogicalResult populatePreprocessTransforms(mlir::PassManager &pm, const FirtoolOptions &opt)
Definition: Firtool.cpp:26
void registerFirtoolCLOptions()
Register a set of useful command-line options that can be used to configure various flags within the ...
Definition: Firtool.cpp:681
LogicalResult populateFinalizeIR(mlir::PassManager &pm, const FirtoolOptions &opt)
Definition: Firtool.cpp:374
LogicalResult populateCHIRRTLToLowFIRRTL(mlir::PassManager &pm, const FirtoolOptions &opt, StringRef inputFilename)
Definition: Firtool.cpp:45
This file defines an intermediate representation for circuits acting as an abstraction for constraint...
Definition: DebugAnalysis.h:21