22#include "mlir/IR/ImplicitLocOpBuilder.h"
23#include "mlir/Pass/Pass.h"
24#include "llvm/ADT/BitVector.h"
25#include "llvm/ADT/DenseMap.h"
26#include "llvm/ADT/EquivalenceClasses.h"
27#include "llvm/ADT/PostOrderIterator.h"
28#include "llvm/Support/Debug.h"
30#define DEBUG_TYPE "firrtl-lower-xmr"
34#define GEN_PASS_DEF_LOWERXMR
35#include "circt/Dialect/FIRRTL/Passes.h.inc"
40using namespace firrtl;
41using hw::InnerRefAttr;
63 using NextNodeOnPath = std::optional<size_t>;
64 using SymOrIndexOp = PointerUnion<Attribute, Operation *>;
68[[maybe_unused]] llvm::raw_ostream &
operator<<(llvm::raw_ostream &os,
69 const XMRNode &node) {
71 if (
auto attr = dyn_cast<Attribute>(node.info))
72 os <<
"path=" << attr;
74 auto subOp = cast<RefSubOp>(cast<Operation *>(node.info));
75 os <<
"index=" << subOp.getIndex() <<
" (-> " << subOp.getType() <<
")";
77 os <<
", next=" << node.next <<
")";
86 ModuleState(FModuleOp &moduleOp) : body(moduleOp.
getBodyBlock()) {}
92 Value getOrCreateXMRRefOp(Type type, FlatSymbolRefAttr symbol,
93 StringAttr suffix, ImplicitLocOpBuilder &builder) {
95 auto it = xmrRefCache.find({type, symbol, suffix});
96 if (it != xmrRefCache.end())
97 return it->getSecond();
100 OpBuilder::InsertionGuard guard(builder);
101 if (xmrRefPoint.isSet())
102 builder.restoreInsertionPoint(xmrRefPoint);
104 builder.setInsertionPointToStart(body);
106 Value xmr = XMRRefOp::create(builder, type, symbol, suffix);
107 xmrRefCache.insert({{type, symbol, suffix}, xmr});
109 xmrRefPoint = builder.saveInsertionPoint();
119 DenseMap<std::tuple<Type, SymbolRefAttr, StringAttr>, Value> xmrRefCache;
122 OpBuilder::InsertPoint xmrRefPoint;
135 &ns, OpBuilder::InsertPoint(getOperation().
getBodyBlock(),
139 llvm::EquivalenceClasses<Value> eq;
143 SmallVector<RefResolveOp> resolveOps;
144 SmallVector<RefSubOp> indexingOps;
145 SmallVector<Operation *> forceAndReleaseOps;
148 auto transferFunc = [&](Operation *op) -> LogicalResult {
149 return TypeSwitch<Operation *, LogicalResult>(op)
150 .Case<RefSendOp>([&](RefSendOp send) {
153 Value xmrDef = send.getBase();
159 if (
auto verbExpr = xmrDef.getDefiningOp<VerbatimExprOp>())
160 if (verbExpr.getSymbolsAttr().empty() && verbExpr->hasOneUse()) {
165 auto inRef = InnerRefAttr();
173 auto *xmrDefOp = xmrDef.getDefiningOp();
180 if (
auto innerSymOp =
181 dyn_cast_or_null<hw::InnerSymbolOpInterface>(xmrDefOp))
182 if (innerSymOp.getTargetResultIndex()) {
192 ImplicitLocOpBuilder b(xmrDef.getLoc(), &getContext());
193 b.setInsertionPointAfterValue(xmrDef);
194 SmallString<32> opName;
195 auto nameKind = NameKindEnum::DroppableName;
201 opName = name +
"_probe";
202 nameKind = NameKindEnum::InterestingName;
203 }
else if (xmrDefOp) {
206 if (
auto name = xmrDefOp->getAttrOfType<StringAttr>(
"name")) {
207 (Twine(name.strref()) +
"_probe").
toVector(opName);
208 nameKind = NameKindEnum::InterestingName;
211 auto node = NodeOp::create(b, xmrDef, opName, nameKind);
212 auto newValue = node.getResult();
216 xmrDef.replaceUsesWithIf(newValue, [&](OpOperand &operand) {
217 if (operand.getOwner() == node.getOperation())
219 if (isa<FConnectLike>(operand.getOwner()) &&
220 operand.getOperandNumber() == 0)
232 .Case<RWProbeOp>([&](RWProbeOp rwprobe) {
238 .Case<MemOp>([&](MemOp mem) {
244 for (
const auto &res : llvm::enumerate(mem.getResults()))
245 if (isa<RefType>(mem.getResult(res.index()).getType())) {
257 .Case<FConnectLike>([&](FConnectLike connect) {
259 if (!isa<RefType>(connect.getSrc().getType()))
263 type_cast<RefType>(connect.getSrc().getType()).getType()))
280 .Case<RefSubOp>([&](RefSubOp op) -> LogicalResult {
286 indexingOps.push_back(op);
289 .Case<RefResolveOp>([&](RefResolveOp
resolve) {
306 .Case<RefCastOp>([&](RefCastOp op) {
312 .Case<Forceable>([&](Forceable op) {
314 if (type_isa<RefType>(op.getDataRaw().getType())) {
320 if (!op.isForceable() || op.getDataRef().use_empty() ||
327 .Case<RefForceOp, RefForceInitialOp, RefReleaseOp,
328 RefReleaseInitialOp>([&](
auto op) {
329 forceAndReleaseOps.push_back(op);
332 .Default([&](
auto) {
return success(); });
335 SmallVector<FModuleOp> publicModules;
338 auto result = instanceGraph.
walkPostOrder([&](
auto &node) -> LogicalResult {
339 auto module = dyn_cast<FModuleOp>(*node.getModule());
342 LLVM_DEBUG(llvm::dbgs()
343 <<
"Traversing module:" << module.getModuleNameAttr() <<
"\n");
347 if (module.isPublic())
348 publicModules.push_back(module);
350 auto result =
module.walk([&](Operation *op) {
351 if (transferFunc(op).failed())
352 return WalkResult::interrupt();
353 return WalkResult::advance();
356 if (result.wasInterrupted())
365 while (!indexingOps.empty()) {
367 decltype(indexingOps) worklist;
368 worklist.swap(indexingOps);
370 for (
auto op : worklist) {
375 indexingOps.push_back(op);
381 if (worklist.size() == indexingOps.size()) {
382 auto op = worklist.front();
385 "indexing through probe of unknown origin (input probe?)")
386 .attachNote(op.getInput().getLoc())
387 .append(
"indexing through this reference");
393 size_t numPorts =
module.getNumPorts();
394 for (
size_t portNum = 0; portNum < numPorts; ++portNum)
395 if (isa<RefType>(module.getPortType(portNum)))
401 return signalPassFailure();
410 llvm::dbgs() <<
"\n dataflow at leader::" << I->getData() <<
"\n =>";
415 llvm::dbgs() <<
"\n " << init;
417 llvm::dbgs() <<
"\n Done\n";
420 for (
auto refResolve : resolveOps)
422 return signalPassFailure();
423 for (
auto *op : forceAndReleaseOps)
425 return signalPassFailure();
426 for (
auto module : publicModules) {
428 return signalPassFailure();
447 auto modName = mod.getModuleName();
448 if (
auto ext = dyn_cast<FExtModuleOp>(*mod))
449 modName = ext.getExtModuleName();
450 (Twine(
"ref_") + modName).
toVector(prefix);
456 const Twine &prefix,
bool backTick =
false) {
457 return StringAttr::get(&getContext(), Twine(backTick ?
"`" :
"") + prefix +
458 "_" + mod.getPortName(portIndex));
462 ImplicitLocOpBuilder builder,
463 mlir::FlatSymbolRefAttr &ref,
464 SmallString<128> &stringLeaf) {
465 assert(stringLeaf.empty());
467 auto remoteOpPath = getRemoteRefSend(refVal);
470 SmallVector<Attribute> refSendPath;
471 SmallVector<RefSubOp> indexing;
473 while (remoteOpPath) {
474 lastIndex = *remoteOpPath;
475 auto entr = refSendPathList[*remoteOpPath];
477 TypeSwitch<XMRNode::SymOrIndexOp>(entr.info)
478 .Case<Attribute>([&](
auto attr) {
482 refSendPath.push_back(attr);
485 [&](
auto *op) { indexing.push_back(cast<RefSubOp>(op)); });
486 remoteOpPath = entr.next;
488 auto iter = xmrPathSuffix.find(lastIndex);
492 if (iter != xmrPathSuffix.end()) {
493 if (!refSendPath.empty())
494 stringLeaf.append(
".");
495 stringLeaf.append(iter->getSecond());
498 assert(!(refSendPath.empty() && stringLeaf.empty()) &&
499 "nothing to index through");
512 for (
auto subOp : llvm::reverse(indexing)) {
513 TypeSwitch<FIRRTLBaseType>(subOp.getInput().getType().getType())
514 .Case<FVectorType, OpenVectorType>([&](
auto vecType) {
515 (Twine(
"[") + Twine(subOp.getIndex()) +
"]").
toVector(stringLeaf);
517 .Case<BundleType, OpenBundleType>([&](
auto bundleType) {
518 auto fieldName = bundleType.getElementName(subOp.getIndex());
519 stringLeaf.append({
".", fieldName});
523 if (!refSendPath.empty())
525 ref = FlatSymbolRefAttr::get(
527 ->getOrCreatePath(builder.getArrayAttr(refSendPath),
535 ImplicitLocOpBuilder &builder,
536 FlatSymbolRefAttr &ref, StringAttr &xmrAttr) {
537 auto remoteOpPath = getRemoteRefSend(refVal);
541 SmallString<128> xmrString;
542 if (failed(resolveReferencePath(refVal, builder, ref, xmrString)))
545 xmrString.empty() ? StringAttr{} : builder.getStringAttr(xmrString);
552 return TypeSwitch<Operation *, LogicalResult>(op)
553 .Case<RefForceOp, RefForceInitialOp, RefReleaseOp, RefReleaseInitialOp>(
556 auto destType = op.getDest().getType();
557 if (isZeroWidth(destType.getType())) {
562 ImplicitLocOpBuilder builder(op.getLoc(), op);
563 FlatSymbolRefAttr ref;
565 if (failed(resolveReference(op.getDest(), builder, ref, str)))
569 moduleStates.find(op->template getParentOfType<FModuleOp>())
571 .getOrCreateXMRRefOp(destType, ref, str, builder);
572 op.getDestMutable().assign(xmr);
575 .Default([](
auto *op) {
576 return op->emitError(
"unexpected operation kind");
583 if (resWidth.has_value() && *resWidth == 0) {
586 auto zeroUintType = UIntType::get(builder.getContext(), 0);
587 auto zeroC = builder.createOrFold<BitCastOp>(
588 resolve.getType(), ConstantOp::create(builder, zeroUintType,
590 resolve.getResult().replaceAllUsesWith(zeroC);
594 FlatSymbolRefAttr ref;
597 if (failed(resolveReference(
resolve.getRef(), builder, ref, str)))
600 Value result = XMRDerefOp::create(builder,
resolve.getType(), ref, str);
601 resolve.getResult().replaceAllUsesWith(result);
606 if (refPortsToRemoveMap[op].size() < numPorts)
607 refPortsToRemoveMap[op].resize(numPorts);
608 refPortsToRemoveMap[op].set(index);
614 Operation *mod = inst.getReferencedModule(instanceGraph);
615 if (
auto extRefMod = dyn_cast<FExtModuleOp>(mod)) {
616 auto numPorts = inst.getNumResults();
617 SmallString<128> circuitRefPrefix;
620 auto getPath = [&](
size_t portNo) {
623 if (circuitRefPrefix.empty())
624 getRefABIPrefix(extRefMod, circuitRefPrefix);
626 return getRefABIMacroForPort(extRefMod, portNo, circuitRefPrefix,
true);
629 for (
const auto &res : llvm::enumerate(inst.getResults())) {
630 if (!isa<RefType>(inst.getResult(res.index()).getType()))
634 auto ind = addReachingSendsEntry(res.value(), inRef);
636 xmrPathSuffix[ind] = getPath(res.index());
638 setPortToRemove(inst, res.index(), numPorts);
639 setPortToRemove(extRefMod, res.index(), numPorts);
643 auto refMod = dyn_cast<FModuleOp>(mod);
644 bool multiplyInstantiated = !visitedModules.insert(refMod).second;
645 for (
size_t portNum = 0, numPorts = inst.getNumResults();
646 portNum < numPorts; ++portNum) {
647 auto instanceResult = inst.getResult(portNum);
648 if (!isa<RefType>(instanceResult.getType()))
651 return inst.emitOpError(
"cannot lower ext modules with RefType ports");
653 setPortToRemove(inst, portNum, numPorts);
655 if (instanceResult.use_empty() ||
656 isZeroWidth(type_cast<RefType>(instanceResult.getType()).getType()))
658 auto refModuleArg = refMod.getArgument(portNum);
659 if (inst.getPortDirection(portNum) == Direction::Out) {
663 auto remoteOpPath = getRemoteRefSend(refModuleArg);
675 if (multiplyInstantiated)
676 return refMod.emitOpError(
677 "multiply instantiated module with input RefType port '")
678 << refMod.getPortName(portNum) <<
"'";
679 dataFlowClasses->unionSets(
680 dataFlowClasses->getOrInsertLeaderValue(refModuleArg),
681 dataFlowClasses->getOrInsertLeaderValue(instanceResult));
688 auto *body = getOperation().getBodyBlock();
691 SmallString<128> circuitRefPrefix;
692 SmallVector<std::tuple<StringAttr, StringAttr, ArrayAttr>> ports;
694 ImplicitLocOpBuilder::atBlockBegin(module.getLoc(), body);
695 for (
size_t portIndex = 0, numPorts = module.getNumPorts();
696 portIndex != numPorts; ++portIndex) {
697 auto refType = type_dyn_cast<RefType>(module.getPortType(portIndex));
698 if (!refType || isZeroWidth(refType.getType()) ||
699 module.getPortDirection(portIndex) != Direction::Out)
702 cast<mlir::TypedValue<RefType>>(
module.getArgument(portIndex));
703 mlir::FlatSymbolRefAttr ref;
704 SmallString<128> stringLeaf;
705 if (failed(resolveReferencePath(portValue, declBuilder, ref, stringLeaf)))
708 SmallString<128> formatString;
710 formatString +=
"{{0}}";
711 formatString += stringLeaf;
715 if (circuitRefPrefix.empty())
716 getRefABIPrefix(module, circuitRefPrefix);
718 getRefABIMacroForPort(module, portIndex, circuitRefPrefix);
719 sv::MacroDeclOp::create(declBuilder, macroName, ArrayAttr(),
721 ports.emplace_back(macroName, declBuilder.getStringAttr(formatString),
722 ref ? declBuilder.getArrayAttr({ref}) : ArrayAttr{});
731 auto fileBuilder = ImplicitLocOpBuilder(module.getLoc(), module);
732 emit::FileOp::create(fileBuilder, circuitRefPrefix +
".sv", [&] {
733 for (
auto [macroName, formatString, symbols] : ports) {
734 sv::MacroDefOp::create(fileBuilder, FlatSymbolRefAttr::get(macroName),
735 formatString, symbols);
744 return moduleNamespaces.try_emplace(module, module).first->second;
748 if (
auto arg = dyn_cast<BlockArgument>(val))
749 return ::getInnerRefTo(
750 cast<FModuleLike>(arg.getParentBlock()->getParentOp()),
753 return getModuleNamespace(mod);
759 return ::getInnerRefTo(op,
761 return getModuleNamespace(mod);
768 bool errorIfNotFound =
true) {
769 auto iter = dataflowAt.find(dataFlowClasses->getOrInsertLeaderValue(val));
770 if (iter != dataflowAt.end())
771 return iter->getSecond();
772 if (!errorIfNotFound)
776 if (BlockArgument arg = dyn_cast<BlockArgument>(val))
777 arg.getOwner()->getParentOp()->emitError(
778 "reference dataflow cannot be traced back to the remote read op "
780 << dyn_cast<FModuleOp>(arg.getOwner()->getParentOp())
781 .getPortName(arg.getArgNumber())
784 val.getDefiningOp()->emitOpError(
785 "reference dataflow cannot be traced back to the remote read op");
792 std::optional<size_t> continueFrom = std::nullopt) {
793 auto leader = dataFlowClasses->getOrInsertLeaderValue(atRefVal);
794 auto indx = refSendPathList.size();
795 dataflowAt[leader] = indx;
796 refSendPathList.push_back({info, continueFrom});
804 for (Operation *op : llvm::reverse(opsToRemove))
806 for (
auto iter : refPortsToRemoveMap)
807 if (
auto mod = dyn_cast<FModuleOp>(iter.getFirst()))
808 mod.erasePorts(iter.getSecond());
809 else if (
auto mod = dyn_cast<FExtModuleOp>(iter.getFirst()))
810 mod.erasePorts(iter.getSecond());
811 else if (
auto inst = dyn_cast<InstanceOp>(iter.getFirst())) {
812 inst.cloneWithErasedPortsAndReplaceUses(iter.getSecond());
814 }
else if (
auto mem = dyn_cast<MemOp>(iter.getFirst())) {
816 ImplicitLocOpBuilder builder(mem.getLoc(), mem);
817 SmallVector<Attribute, 4> resultNames;
818 SmallVector<Type, 4> resultTypes;
819 SmallVector<Attribute, 4> portAnnotations;
820 SmallVector<Value, 4> oldResults;
821 for (
const auto &res : llvm::enumerate(mem.getResults())) {
822 if (isa<RefType>(mem.getResult(res.index()).getType()))
824 resultNames.push_back(mem.getPortNameAttr(res.index()));
825 resultTypes.push_back(res.value().getType());
826 portAnnotations.push_back(mem.getPortAnnotation(res.index()));
827 oldResults.push_back(res.value());
829 auto newMem = MemOp::create(
830 builder, resultTypes, mem.getReadLatency(), mem.getWriteLatency(),
831 mem.getDepth(), RUWBehavior::Undefined,
832 builder.getArrayAttr(resultNames), mem.getNameAttr(),
833 mem.getNameKind(), mem.getAnnotations(),
834 builder.getArrayAttr(portAnnotations), mem.getInnerSymAttr(),
835 mem.getInitAttr(), mem.getPrefixAttr());
836 for (
const auto &res : llvm::enumerate(oldResults))
837 res.value().replaceAllUsesWith(newMem.getResult(res.index()));
841 refPortsToRemoveMap.clear();
843 refSendPathList.clear();
844 moduleStates.clear();
assert(baseType &&"element must be base type")
static mlir::Operation * resolve(Context &context, mlir::SymbolRefAttr sym)
static std::vector< mlir::Value > toVector(mlir::ValueRange range)
static Block * getBodyBlock(FModuleLike mod)
LogicalResult resolveReference(mlir::TypedValue< RefType > refVal, ImplicitLocOpBuilder &builder, FlatSymbolRefAttr &ref, StringAttr &xmrAttr)
DenseMap< Operation *, hw::InnerSymbolNamespace > moduleNamespaces
Cached module namespaces.
llvm::EquivalenceClasses< Value > * dataFlowClasses
DenseMap< size_t, SmallString< 128 > > xmrPathSuffix
Record the internal path to an external module or a memory.
InnerRefAttr getInnerRefTo(Value val)
size_t addReachingSendsEntry(Value atRefVal, XMRNode::SymOrIndexOp info, std::optional< size_t > continueFrom=std::nullopt)
DenseMap< FModuleOp, ModuleState > moduleStates
Per-module helpers for creating operations within modules.
LogicalResult resolveReferencePath(mlir::TypedValue< RefType > refVal, ImplicitLocOpBuilder builder, mlir::FlatSymbolRefAttr &ref, SmallString< 128 > &stringLeaf)
DenseMap< Value, size_t > dataflowAt
Map of a reference value to an entry into refSendPathList.
void setPortToRemove(Operation *op, size_t index, size_t numPorts)
hw::InnerSymbolNamespace & getModuleNamespace(FModuleLike module)
Get the cached namespace for a module.
void markForRemoval(Operation *op)
hw::HierPathCache * hierPathCache
Utility to create HerPathOps at a predefined location in the circuit.
LogicalResult handlePublicModuleRefPorts(FModuleOp module)
void getRefABIPrefix(FModuleLike mod, SmallVectorImpl< char > &prefix)
Generate the ABI ref_<module> prefix string into prefix.
void runOnOperation() override
LogicalResult handleRefResolve(RefResolveOp resolve)
DenseMap< Operation *, llvm::BitVector > refPortsToRemoveMap
SmallVector< XMRNode > refSendPathList
refSendPathList is used to construct a path to the RefSendOp.
LogicalResult handleInstanceOp(InstanceOp inst, InstanceGraph &instanceGraph)
LogicalResult handleForceReleaseOp(Operation *op)
std::optional< size_t > getRemoteRefSend(Value val, bool errorIfNotFound=true)
DenseSet< Operation * > visitedModules
InnerRefAttr getInnerRefTo(Operation *op)
StringAttr getRefABIMacroForPort(FModuleLike mod, size_t portIndex, const Twine &prefix, bool backTick=false)
Get full macro name as StringAttr for the specified ref port.
CircuitNamespace * circuitNamespace
bool isZeroWidth(FIRRTLBaseType t)
SmallVector< Operation * > opsToRemove
RefResolve, RefSend, and Connects involving them that will be removed.
int32_t getBitWidthOrSentinel()
If this is an IntType, AnalogType, or sugar type for a single bit (Clock, Reset, etc) then return the...
This graph tracks modules and where they are instantiated.
decltype(auto) walkPostOrder(Fn &&fn)
Perform a post-order walk across the modules.
FieldRef getFieldRefFromValue(Value value, bool lookThroughCasts=false)
Get the FieldRef from a value.
hw::InnerRefAttr getInnerRefTo(const hw::InnerSymTarget &target, GetNamespaceCallback getNamespace)
Obtain an inner reference to the target (operation or port), adding an inner symbol as necessary.
llvm::raw_ostream & operator<<(llvm::raw_ostream &os, const InstanceInfo::LatticeValue &value)
std::pair< std::string, bool > getFieldName(const FieldRef &fieldRef, bool nameSafe=false)
Get a string identifier representing the FieldRef.
std::optional< int64_t > getBitWidth(FIRRTLBaseType type, bool ignoreFlip=false)
IntegerAttr getIntZerosAttr(Type type)
Utility for generating a constant zero attribute.
The InstanceGraph op interface, see InstanceGraphInterface.td for more details.
The namespace of a CircuitOp, generally inhabited by modules.