'calyx' Dialect
Types and operations for the Calyx dialect
Calyx is an intermediate language and infrastructure for building compilers that generate custom hardware accelerators. For more information, visit the documentation.
Operations ¶
calyx.assign
(::circt::calyx::AssignOp) ¶
Calyx Assignment
The “calyx.assign” operation represents a non-blocking assignment. An assignment may optionally be guarded, which controls when the assignment should be active. This operation should only be instantiated in the “calyx.wires” section or a “calyx.group”.
calyx.assign %dest = %src : i16
calyx.assign %dest = %guard ? %src : i16
Traits: HasParent<GroupOp, CombGroupOp, StaticGroupOp, WiresOp>
Operands: ¶
Operand | Description |
---|---|
dest | any type |
src | any type |
guard | 1-bit signless integer |
calyx.comb_component
(::circt::calyx::CombComponentOp) ¶
Calyx Combinational Component
The “calyx.comb_component” operation represents a Calyx combinational component containing: (1) In- and output port definitions that define the interface. (2) Combinational cells and wires.
calyx.comb_component @C(%in: i32) -> (%out: i16) {
...
calyx.wires { ... }
}
Traits: HasParent<mlir::ModuleOp>
, IsolatedFromAbove
, NoTerminator
, SingleBlock
, SymbolTable
Interfaces: CallableOpInterface
, ComponentInterface
, FunctionOpInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
function_type | ::mlir::TypeAttr | type attribute of function type |
arg_attrs | ::mlir::ArrayAttr | Array of dictionary attributes |
res_attrs | ::mlir::ArrayAttr | Array of dictionary attributes |
portNames | ::mlir::ArrayAttr | array attribute |
portAttributes | ::mlir::ArrayAttr | array attribute |
portDirections | ::mlir::IntegerAttr | arbitrary integer attribute |
calyx.comb_group
(::circt::calyx::CombGroupOp) ¶
Calyx Combinational Group
Syntax:
operation ::= `calyx.comb_group` $sym_name $body attr-dict
Represents a Calyx combinational group, which is a collection of combinational assignments that are only active when the group is run from the control execution schedule. A combinational group does not have group_go or group_done operators.
calyx.comb_group @MyCombGroup {
calyx.assign %1 = %2 : i32
}
Traits: HasParent<WiresOp>
, NoRegionArguments
, NoTerminator
, SingleBlock
Interfaces: GroupInterface
, RegionKindInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
calyx.component
(::circt::calyx::ComponentOp) ¶
Calyx Component
The “calyx.component” operation represents an overall Calyx component containing: (1) In- and output port definitions that define the interface. (2) The cells, wires, and control schedule.
A Calyx component requires attributes clk
, go
, and reset
on separate input ports,
and done
on an output port.
calyx.component @C(%in: i32, %go: i1 {go}, %clk: i1 {clk}, %reset: i1 {reset}) -> (%out: i16, %done: i1 {done}) {
...
calyx.wires { ... }
calyx.control { ... }
}
Traits: HasParent<mlir::ModuleOp>
, IsolatedFromAbove
, NoTerminator
, SingleBlock
, SymbolTable
Interfaces: CallableOpInterface
, ComponentInterface
, FunctionOpInterface
, OpAsmOpInterface
, RegionKindInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
function_type | ::mlir::TypeAttr | type attribute of function type |
arg_attrs | ::mlir::ArrayAttr | Array of dictionary attributes |
res_attrs | ::mlir::ArrayAttr | Array of dictionary attributes |
portNames | ::mlir::ArrayAttr | array attribute |
portAttributes | ::mlir::ArrayAttr | array attribute |
portDirections | ::mlir::IntegerAttr | arbitrary integer attribute |
calyx.constant
(::circt::calyx::ConstantOp) ¶
Constant capable of representing an integer or floating point value
Syntax:
operation ::= `calyx.constant` $sym_name ` ` `<` $value `>` attr-dict `:` qualified(type($out))
The constant
operation is a wrapper around bit vectors with fixed-size number of bits.
Specific value and intended type should be specified via attribute only.
Example:
// Integer constant
%1 = calyx.constant <42 : i32> : i32
// Floating point constant
%1 = calyx.constant <4.2 : f32> : i32
Traits: ConstantLike
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
value | ::mlir::TypedAttr | TypedAttr instance |
Results: ¶
Result | Description |
---|---|
out | signless integer |
calyx.control
(::circt::calyx::ControlOp) ¶
Calyx Control
Syntax:
operation ::= `calyx.control` $body attr-dict
The “calyx.control” operation represents the execution schedule defined for the given component, i.e. when each group executes.
calyx.control {
calyx.seq {
calyx.enable @GroupA
}
}
Traits: HasParent<ComponentOp>
, NoRegionArguments
, NoTerminator
, SingleBlock
, SymbolTable
calyx.cycle
(::circt::calyx::CycleOp) ¶
Calyx Static Cycle Op
Returns an I1 signal that is active start
cycles after the static
group starts, and inactive all other times. Optional end
attribute allows the signal to be active from until end
cycles
after the static group starts. Must be used within a static group.
calyx.static_group latency<2> @MyStaticGroup {
%1 = calyx.cycle 1 : i1
}
Traits: HasParent<StaticGroupOp>
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
start | ::mlir::IntegerAttr | 32-bit signless integer attribute |
end | ::mlir::IntegerAttr | 32-bit signless integer attribute |
Results: ¶
Result | Description |
---|---|
active | 1-bit signless integer |
calyx.enable
(::circt::calyx::EnableOp) ¶
Calyx Enable
Syntax:
operation ::= `calyx.enable` $groupName attr-dict
The “calyx.enable” operation represents the execution of a group defined explicitly in the “calyx.wires” section.
The ‘compiledGroups’ attribute is used in the Compile Control pass to track which groups are compiled within the new compilation group.
calyx.enable @SomeGroup
Traits: ControlLike
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
groupName | ::mlir::FlatSymbolRefAttr | flat symbol reference attribute |
compiledGroups | ::mlir::ArrayAttr | array attribute |
calyx.group
(::circt::calyx::GroupOp) ¶
Calyx Group
Syntax:
operation ::= `calyx.group` $sym_name $body attr-dict
Represents a Calyx group, which is a collection of assignments that are only active when the group is run from the control execution schedule. A group signifies its termination with a special port named a “done” port.
calyx.group @MyGroup {
calyx.assign %1 = %2 : i32
calyx.group_done %3 : i1
}
Traits: HasParent<WiresOp>
, NoRegionArguments
, SingleBlock
Interfaces: GroupInterface
, RegionKindInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
calyx.group_done
(::circt::calyx::GroupDoneOp) ¶
Calyx Group Done Port
The “calyx.group_done” operation represents a port on a Calyx group that signifies when the group is finished. A done operation may optionally be guarded, which controls when the group’s done operation should be active.
calyx.group_done %src : i1
calyx.group_done %guard ? %src : i1
Traits: HasParent<GroupOp>
, Terminator
Operands: ¶
Operand | Description |
---|---|
src | 1-bit signless integer |
guard | 1-bit signless integer |
calyx.group_go
(::circt::calyx::GroupGoOp) ¶
Calyx Group Go Port
The “calyx.group_go” operation represents a port on a Calyx group that signifies when the group begins. A go operation may optionally be guarded, which controls when the group’s go operation should be active. The go operation should only be inserted during the Go Insertion pass. It does not receive a source until the Compile Control pass.
%group_name1.go = calyx.group_go %src : i1
%group_name2.go = calyx.group_go %guard ? %src : i1
Traits: HasParent<GroupOp>
Interfaces: OpAsmOpInterface
Operands: ¶
Operand | Description |
---|---|
src | 1-bit signless integer |
guard | 1-bit signless integer |
Results: ¶
Result | Description |
---|---|
«unnamed» | 1-bit signless integer |
calyx.ieee754.add
(::circt::calyx::AddFOpIEEE754) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.ieee754.add` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Interfaces: CellInterface
, FloatingPointOpInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
clk | 1-bit signless integer |
reset | 1-bit signless integer |
go | 1-bit signless integer |
control | 1-bit signless integer |
subOp | 1-bit signless integer |
left | signless integer |
right | signless integer |
roundingMode | signless integer |
out | signless integer |
exceptionalFlags | signless integer |
done | 1-bit signless integer |
calyx.ieee754.mul
(::circt::calyx::MulFOpIEEE754) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.ieee754.mul` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Interfaces: CellInterface
, FloatingPointOpInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
clk | 1-bit signless integer |
reset | 1-bit signless integer |
go | 1-bit signless integer |
control | 1-bit signless integer |
left | signless integer |
right | signless integer |
roundingMode | signless integer |
out | signless integer |
exceptionalFlags | signless integer |
done | 1-bit signless integer |
calyx.if
(::circt::calyx::IfOp) ¶
Calyx If
Syntax:
operation ::= `calyx.if` $cond (`with` $groupName^)? $thenRegion (`else` $elseRegion^)? attr-dict
The “calyx.if” operation represents and if-then-else construct for conditionally executing two Calyx groups. The operands to an if operation is a 1-bit port and an optional combinational group under which this port is driven.
Note: The native and CIRCT Calyx IRs may diverge wrt. ‘with’ execution, see: https://github.com/cucapra/calyx/discussions/588
calyx.if %1 with @G1 {
calyx.enable @G2
...
} else {
calyx.enable @G3
...
}
calyx.if %1 {
calyx.enable @G2
...
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
Interfaces: IfInterface
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
groupName | ::mlir::FlatSymbolRefAttr | flat symbol reference attribute |
Operands: ¶
Operand | Description |
---|---|
cond | 1-bit signless integer |
calyx.instance
(::circt::calyx::InstanceOp) ¶
Calyx Component Instance
Syntax:
operation ::= `calyx.instance` $sym_name `of` $componentName attr-dict (`:` qualified(type($results))^)?
Represents an instance of a Calyx component, which may include state.
%c.in, %c.out = calyx.instance @c of @MyComponent : i64, i16
Interfaces: CellInterface
, OpAsmOpInterface
, SymbolUserOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
componentName | ::mlir::FlatSymbolRefAttr | flat symbol reference attribute |
Results: ¶
Result | Description |
---|---|
results | variadic of any type |
calyx.invoke
(::circt::calyx::InvokeOp) ¶
Calyx Invoke
calyx.invoke is similar to the behavior of a function call, which invokes a given component.
The ‘callee’ attribute is the name of the component,
the ‘ports’ attribute specifies the input port of the component when it is invoked,
the ‘inputs’ attribute specifies the assignment on the corresponding port,
and the ‘refCellsMap’ attribute maps the reference cells in the callee
with
the original cells in the caller.
calyx.component @identity {
%mem.addr0, %mem.clk, ... = calyx.seq_mem @mem <[1] x 32> [1] {external = false}
}
%id.in, %id.out, ... = calyx.instance @id of @identity : i32, i32, ...
%r.in, ... = calyx.register @r : i32, ...
%mem_1.addr0, %mem_1.clk, ... = calyx.seq_mem @mem_1 <[1] x 32> [1] {external = true}
...
calyx.control {
calyx.seq {
calyx.invoke @id[mem = mem_1](%id.in = %c1_10, %r.in = %id.out) -> (i32, i32)
}
}
Traits: ControlLike
, SameVariadicOperandSize
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
callee | ::mlir::FlatSymbolRefAttr | flat symbol reference attribute |
refCellsMap | ::mlir::ArrayAttr | array attribute |
portNames | ::mlir::ArrayAttr | array attribute |
inputNames | ::mlir::ArrayAttr | array attribute |
Operands: ¶
Operand | Description |
---|---|
ports | variadic of any type |
inputs | variadic of any type |
calyx.memory
(::circt::calyx::MemoryOp) ¶
Defines a memory
Syntax:
operation ::= `calyx.memory` $sym_name ` ` `<` $sizes `x` $width `>` $addrSizes attr-dict `:` qualified(type($results))
The “calyx.memory” op defines a memory. Memories can have any number of
dimensions, as specified by the length of the $sizes
and $addrSizes
arrays. The $addrSizes
specify the bitwidth of each dimension’s address,
and should be wide enough to address the range of the corresponding
dimension in $sizes
. The $width
attribute dictates the width of a single
element.
See https://docs.calyxir.org/libraries/core.html#memories for more information.
// A 1-dimensional, 32-bit memory with size dimension 1. Equivalent representation in the native compiler:
// `m1 = std_mem_d1(32, 1, 1)`
%m1.addr0, %m1.write_data, %m1.write_en, %m1.clk, %m1.read_data, %m1.done = calyx.memory @m1 <[1] x 32> [1] : i1, i32, i1, i1, i32, i1
// A 2-dimensional, 8-bit memory with size dimensions 64 x 64. Equivalent representation in the native compiler:
// `m2 = std_mem_d2(8, 64, 64, 6, 6)`
%m2.addr0, %m2.addr1, %m2.write_data, %m2.write_en, %m2.clk, %m2.read_data, %m2.done = calyx.memory @m2 <[64, 64] x 8> [6, 6] : i6, i6, i8, i1, i1, i8, i1
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
width | ::mlir::IntegerAttr | 64-bit signless integer attribute |
sizes | ::mlir::ArrayAttr | array attribute |
addrSizes | ::mlir::ArrayAttr | array attribute |
Results: ¶
Result | Description |
---|---|
results | variadic of signless integer |
calyx.par
(::circt::calyx::ParOp) ¶
Calyx Parallel
Syntax:
operation ::= `calyx.par` $body attr-dict
The “calyx.par” operation executes the control within its region in parallel.
calyx.par {
// G1 and G2 will execute in parallel.
// The region is complete when both
// G1 and G2 are done.
calyx.enable @G1
calyx.enable @G2
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
calyx.primitive
(::circt::calyx::PrimitiveOp) ¶
Calyx Primitive Instance
Syntax:
operation ::= `calyx.primitive` $sym_name `of` $primitiveName `` custom<ParameterList>($parameters) attr-dict (`:` qualified(type($results))^)?
Represents an instance of a Calyx primitive.
%c.in, %c.out = calyx.primitive @c of @MyExternalPrimitive : i64, i16
Interfaces: CellInterface
, OpAsmOpInterface
, SymbolUserOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
parameters | ::mlir::ArrayAttr | parameter array |
primitiveName | ::mlir::FlatSymbolRefAttr | flat symbol reference attribute |
Results: ¶
Result | Description |
---|---|
results | variadic of any type |
calyx.register
(::circt::calyx::RegisterOp) ¶
Defines a register
Syntax:
operation ::= `calyx.register` $sym_name attr-dict `:` qualified(type(results))
The “calyx.register” op defines a register.
// A 32-bit register.
%r.in, %r.write_en, %r.clk, %r.reset, %r.out, %r.done = calyx.register @r : i32, i1, i1, i1, i32, i1
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
in | any type |
write_en | 1-bit signless integer |
clk | 1-bit signless integer |
reset | 1-bit signless integer |
out | any type |
done | 1-bit signless integer |
calyx.repeat
(::circt::calyx::RepeatOp) ¶
Calyx Dynamic Repeat
Syntax:
operation ::= `calyx.repeat` $count $body attr-dict
The “calyx.repeat” operation represents the repeated execution of the control within its region. The key difference with static repeat is that the body (unlike with static repeat) can be dynamically timed.
calyx.repeat 10 {
calyx.enable @G1
...
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
count | ::mlir::IntegerAttr | 32-bit signless integer attribute |
calyx.seq
(::circt::calyx::SeqOp) ¶
Calyx Sequential
Syntax:
operation ::= `calyx.seq` $body attr-dict
The “calyx.seq” operation executes the control within its region sequentially.
calyx.seq {
// G2 will not begin execution until G1 is done.
calyx.enable @G1
calyx.enable @G2
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
calyx.seq_mem
(::circt::calyx::SeqMemoryOp) ¶
Defines a memory with sequential read
Syntax:
operation ::= `calyx.seq_mem` $sym_name ` ` `<` $sizes `x` $width `>` $addrSizes attr-dict `:` qualified(type($results))
The “calyx.seq_mem” op defines a memory with sequential reads. Memories can
have any number of dimensions, as specified by the length of the $sizes
and
$addrSizes
arrays. The $addrSizes
specify the bitwidth of each dimension’s
address, and should be wide enough to address the range of the corresponding
dimension in $sizes
. The $width
attribute dictates the width of a single
element.
See https://docs.calyxir.org/libraries/core.html#memories for more information.
// A 1-dimensional, 32-bit memory with size dimension 1. Equivalent representation in the native compiler:
// `m1 = seq_mem_d1(32, 1, 1)`
%m1.addr0, %m1.write_data, %m1.write_en, %m1.clk, %m1.read_data, %m1.read_en, %m1.done = calyx.memory @m1 <[1] x 32> [1] : i1, i32, i1, i1, i32, i1
// A 2-dimensional, 8-bit memory with size dimensions 64 x 64. Equivalent representation in the native compiler:
// `m2 = seq_mem_d2(8, 64, 64, 6, 6)`
%m2.addr0, %m2.addr1, %m2.write_data, %m2.write_en, %m2.write_done, %m2.clk, %m2.read_data, %m2.read_en, %m2.read_done = calyx.memory @m2 <[64, 64] x 8> [6, 6] : i6, i6, i8, i1, i1, i8, i1
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
width | ::mlir::IntegerAttr | 64-bit signless integer attribute |
sizes | ::mlir::ArrayAttr | array attribute |
addrSizes | ::mlir::ArrayAttr | array attribute |
Results: ¶
Result | Description |
---|---|
results | variadic of signless integer |
calyx.static_group
(::circt::calyx::StaticGroupOp) ¶
Calyx Static Group
Syntax:
operation ::= `calyx.static_group` `latency` `<` $latency `>` $sym_name $body attr-dict
Represents a Calyx static group, which is a collection of assignments that are only active when the group is run from the control execution schedule. A group signifies its termination with a special port named a “done” port.
calyx.static_group latency<1> @MyStaticGroup {
calyx.assign %1 = %2 : i32
}
Traits: HasParent<WiresOp>
, NoRegionArguments
, NoTerminator
, SingleBlock
Interfaces: GroupInterface
, RegionKindInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
latency | ::mlir::IntegerAttr | 64-bit signless integer attribute |
calyx.static_if
(::circt::calyx::StaticIfOp) ¶
Calyx Static If
Syntax:
operation ::= `calyx.static_if` $cond $thenRegion (`else` $elseRegion^)? attr-dict
The “calyx.static_if” operation represents an if-then-else construct for conditionally executing two Calyx groups. The operands to an if operation is a 1-bit port.
calyx.static_if %1 {
calyx.enable @G2
...
} else {
calyx.enable @G3
...
}
calyx.if %1 {
calyx.enable @G2
...
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
Interfaces: IfInterface
Operands: ¶
Operand | Description |
---|---|
cond | 1-bit signless integer |
calyx.static_par
(::circt::calyx::StaticParOp) ¶
Calyx Static Parallel
Syntax:
operation ::= `calyx.static_par` $body attr-dict
The “calyx.static_par” operation executes the control within its region in parallel.
calyx.static_par {
// G1 and G2 will execute in parallel.
// The region is complete when both
// G1 and G2 are done.
calyx.enable @G1
calyx.enable @G2
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
calyx.static_repeat
(::circt::calyx::StaticRepeatOp) ¶
Calyx Static Repeat
Syntax:
operation ::= `calyx.static_repeat` $count $body attr-dict
The “calyx.static_repeat” operation represents the repeated execution of the control within its region. All control within the region must be static.
calyx.static_repeat 10 {
calyx.enable @G1
...
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
count | ::mlir::IntegerAttr | 32-bit signless integer attribute |
calyx.static_seq
(::circt::calyx::StaticSeqOp) ¶
Calyx Static Seq
Syntax:
operation ::= `calyx.static_seq` $body attr-dict
The “calyx.static_seq” operation executes the control within its region sequentially.
calyx.static_seq {
// G2 will not begin execution until G1 is done.
calyx.enable @G1
calyx.enable @G2
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
calyx.std_add
(::circt::calyx::AddLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_add` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_and
(::circt::calyx::AndLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_and` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_divs_pipe
(::circt::calyx::DivSPipeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_divs_pipe` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
clk | 1-bit signless integer |
reset | 1-bit signless integer |
go | 1-bit signless integer |
left | any type |
right | any type |
out | any type |
done | 1-bit signless integer |
calyx.std_divu_pipe
(::circt::calyx::DivUPipeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_divu_pipe` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
clk | 1-bit signless integer |
reset | 1-bit signless integer |
go | 1-bit signless integer |
left | any type |
right | any type |
out | any type |
done | 1-bit signless integer |
calyx.std_eq
(::circt::calyx::EqLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_eq` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_ge
(::circt::calyx::GeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_ge` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_gt
(::circt::calyx::GtLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_gt` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_le
(::circt::calyx::LeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_le` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_lsh
(::circt::calyx::LshLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_lsh` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_lt
(::circt::calyx::LtLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_lt` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_mult_pipe
(::circt::calyx::MultPipeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_mult_pipe` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
clk | 1-bit signless integer |
reset | 1-bit signless integer |
go | 1-bit signless integer |
left | any type |
right | any type |
out | any type |
done | 1-bit signless integer |
calyx.std_mux
(::circt::calyx::MuxLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_mux` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
cond | 1-bit signless integer |
tru | any type |
fal | any type |
out | any type |
calyx.std_neq
(::circt::calyx::NeqLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_neq` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_not
(::circt::calyx::NotLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_not` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
in | integer |
out | integer |
calyx.std_or
(::circt::calyx::OrLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_or` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_pad
(::circt::calyx::PadLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_pad` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
in | integer |
out | integer |
calyx.std_rems_pipe
(::circt::calyx::RemSPipeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_rems_pipe` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
clk | 1-bit signless integer |
reset | 1-bit signless integer |
go | 1-bit signless integer |
left | any type |
right | any type |
out | any type |
done | 1-bit signless integer |
calyx.std_remu_pipe
(::circt::calyx::RemUPipeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_remu_pipe` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
clk | 1-bit signless integer |
reset | 1-bit signless integer |
go | 1-bit signless integer |
left | any type |
right | any type |
out | any type |
done | 1-bit signless integer |
calyx.std_rsh
(::circt::calyx::RshLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_rsh` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_seq
(::circt::calyx::SeqLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_seq` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_sge
(::circt::calyx::SgeLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_sge` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_sgt
(::circt::calyx::SgtLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_sgt` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_shru
(::circt::calyx::ShruLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_shru` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_signext
(::circt::calyx::ExtSILibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_signext` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
in | integer |
out | integer |
calyx.std_sle
(::circt::calyx::SleLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_sle` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_slice
(::circt::calyx::SliceLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_slice` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
in | integer |
out | integer |
calyx.std_slt
(::circt::calyx::SltLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_slt` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_sneq
(::circt::calyx::SneqLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_sneq` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | 1-bit signless integer |
calyx.std_srsh
(::circt::calyx::SrshLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_srsh` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_sub
(::circt::calyx::SubLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_sub` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.std_wire
(::circt::calyx::WireLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_wire` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
in | integer |
out | integer |
calyx.std_xor
(::circt::calyx::XorLibOp) ¶
Defines an operation which maps to a Calyx library primitive
Syntax:
operation ::= `calyx.std_xor` $sym_name attr-dict `:` qualified(type(results))
This operation represents an instance of a Calyx library primitive. A library primitive maps to some hardware-implemented component within the native Calyx compiler.
// A 32-bit adder. This falls under the binary library operations.
%add.left, %add.right, %add.out = calyx.std_add @add : i32, i32, i32
// An 8-bit comparison operator (with a 1-bit output). This falls under
// the boolean binary library operations.
%gt.left, %gt.right, %gt.out = calyx.std_gt @gt : i8, i8, i1
// An 8-bit to 16-bit pad operator. This falls under the unary
// library operations.
%pad.in, %pad.out = calyx.std_pad @pad : i8, i16
Traits: Combinational
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
left | any type |
right | any type |
out | any type |
calyx.undef
(::circt::calyx::UndefinedOp) ¶
Calyx Undefined Value
Syntax:
operation ::= `calyx.undef` attr-dict `:` qualified(type($res))
The “undef” operation represents an undefined value that may be used when a specific source or destination does not have an assignment yet. This is used to avoid pulling in the entire LLVMIR dialect for a single operation.
%0 = calyx.undef : i1
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable
, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Results: ¶
Result | Description |
---|---|
res | any type |
calyx.undefined
(::circt::calyx::UndefLibOp) ¶
An undefined signal
Syntax:
operation ::= `calyx.undefined` $sym_name attr-dict `:` qualified(type(results))
The “calyx.undef” op defines an undefined signal. An undefined signal can be replaced with any value representable in n-bits.
// A 32-bit undefined value
%undef.out = calyx.undef @undef : i32
Interfaces: CellInterface
, OpAsmOpInterface
, Symbol
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
sym_name | ::mlir::StringAttr | string attribute |
Results: ¶
Result | Description |
---|---|
out | any type |
calyx.while
(::circt::calyx::WhileOp) ¶
Calyx While
Syntax:
operation ::= `calyx.while` $cond (`with` $groupName^)? $body attr-dict
The “calyx.while” operation represents a construct for continuously executing the inner groups of the ‘while’ operation while the condition port evaluates to true. The operands to a while operation is a 1-bit port and an optional combinational group under which this port is driven.
Note: The native and CIRCT Calyx IRs may diverge wrt. ‘with’ execution, see: https://github.com/cucapra/calyx/discussions/588
calyx.while %1 with @G1 {
calyx.enable @G2
...
}
calyx.while %1 {
calyx.enable @G2
...
}
Traits: ControlLike
, NoRegionArguments
, NoTerminator
, SingleBlock
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
groupName | ::mlir::FlatSymbolRefAttr | flat symbol reference attribute |
Operands: ¶
Operand | Description |
---|---|
cond | 1-bit signless integer |
calyx.wires
(::circt::calyx::WiresOp) ¶
Calyx Wires
Syntax:
operation ::= `calyx.wires` $body attr-dict
The “calyx.wires” operation represents a set of guarded connections between component instances, which may be placed within groups.
calyx.wires {
calyx.group @A { ... }
calyx.assign %1 = %2 : i16
}
Traits: HasParent<ComponentOp, CombComponentOp>
, NoRegionArguments
, NoTerminator
, SingleBlock
, SymbolTable
Interfaces: RegionKindInterface