'rtgtest' Dialect
Types and operations for random test generation testing
This dialect defines the rtgtest dialect, which provides a set of
operation definitions to test the RTG dialect.
Operations ¶
rtgtest.add (::circt::rtgtest::ADD) ¶
Syntax:
operation ::= `rtgtest.add` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.addi (::circt::rtgtest::ADDI) ¶
Syntax:
operation ::= `rtgtest.addi` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.and (::circt::rtgtest::AND) ¶
Syntax:
operation ::= `rtgtest.and` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.andi (::circt::rtgtest::ANDI) ¶
Syntax:
operation ::= `rtgtest.andi` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.auipc (::circt::rtgtest::AUIPC) ¶
Syntax:
operation ::= `rtgtest.auipc` $rd `,` $imm `:` type($imm) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
imm | a 32-bit immediate or a reference to a label |
rtgtest.beq (::circt::rtgtest::BEQ) ¶
Syntax:
operation ::= `rtgtest.beq` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 13-bit immediate or a reference to a label |
rtgtest.bge (::circt::rtgtest::BGE) ¶
Syntax:
operation ::= `rtgtest.bge` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 13-bit immediate or a reference to a label |
rtgtest.bgeu (::circt::rtgtest::BGEU) ¶
Syntax:
operation ::= `rtgtest.bgeu` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 13-bit immediate or a reference to a label |
rtgtest.blt (::circt::rtgtest::BLT) ¶
Syntax:
operation ::= `rtgtest.blt` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 13-bit immediate or a reference to a label |
rtgtest.bltu (::circt::rtgtest::BLTU) ¶
Syntax:
operation ::= `rtgtest.bltu` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 13-bit immediate or a reference to a label |
rtgtest.bne (::circt::rtgtest::BNE) ¶
Syntax:
operation ::= `rtgtest.bne` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 13-bit immediate or a reference to a label |
rtgtest.constant_test (::circt::rtgtest::ConstantTestOp) ¶
Syntax:
operation ::= `rtgtest.constant_test` type($result) attr-dict
Traits: AlwaysSpeculatableImplTrait, ConstantLike
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attributes: ¶
| Attribute | MLIR Type | Description |
|---|---|---|
value | ::mlir::Attribute | any attribute |
Results: ¶
| Result | Description |
|---|---|
result | any type |
rtgtest.ebreak (::circt::rtgtest::EBREAKOp) ¶
Syntax:
operation ::= `rtgtest.ebreak` attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
rtgtest.ecall (::circt::rtgtest::ECALLOp) ¶
Syntax:
operation ::= `rtgtest.ecall` attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
rtgtest.get_hartid (::circt::rtgtest::GetHartIdOp) ¶
Syntax:
operation ::= `rtgtest.get_hartid` $cpu attr-dict
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operands: ¶
| Operand | Description |
|---|---|
cpu | handle to a specific CPU |
Results: ¶
| Result | Description |
|---|---|
hartid | index |
rtgtest.implicit_constraint_op (::circt::rtgtest::ImplicitConstraintTestOp) ¶
Syntax:
operation ::= `rtgtest.implicit_constraint_op` (`implicit_constraint` $implicitConstraint^)? attr-dict
Interfaces: ImplicitConstraintOpInterface
Attributes: ¶
| Attribute | MLIR Type | Description |
|---|---|---|
implicitConstraint | ::mlir::UnitAttr | unit attribute |
rtgtest.jal (::circt::rtgtest::JAL) ¶
Syntax:
operation ::= `rtgtest.jal` $rd `,` $imm `:` type($imm) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
imm | a 21-bit immediate or a reference to a label |
rtgtest.jalr (::circt::rtgtest::JALROp) ¶
Syntax:
operation ::= `rtgtest.jalr` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.la (::circt::rtgtest::LA) ¶
Syntax:
operation ::= `rtgtest.la` $rd `,` $mem `:` type($mem) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
mem | a 32-bit addressable memory or a 32-bit immediate or a reference to a label |
rtgtest.lb (::circt::rtgtest::LBOp) ¶
Syntax:
operation ::= `rtgtest.lb` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.lbu (::circt::rtgtest::LBUOp) ¶
Syntax:
operation ::= `rtgtest.lbu` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.lh (::circt::rtgtest::LHOp) ¶
Syntax:
operation ::= `rtgtest.lh` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.lhu (::circt::rtgtest::LHUOp) ¶
Syntax:
operation ::= `rtgtest.lhu` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.lui (::circt::rtgtest::LUI) ¶
Syntax:
operation ::= `rtgtest.lui` $rd `,` $imm `:` type($imm) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
imm | a 32-bit immediate or a reference to a label |
rtgtest.lw (::circt::rtgtest::LWOp) ¶
Syntax:
operation ::= `rtgtest.lw` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.or (::circt::rtgtest::OR) ¶
Syntax:
operation ::= `rtgtest.or` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.ori (::circt::rtgtest::ORI) ¶
Syntax:
operation ::= `rtgtest.ori` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.sb (::circt::rtgtest::SB) ¶
Syntax:
operation ::= `rtgtest.sb` $rs1 `,` $rs2 `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 12-bit immediate |
rtgtest.sh (::circt::rtgtest::SH) ¶
Syntax:
operation ::= `rtgtest.sh` $rs1 `,` $rs2 `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 12-bit immediate |
rtgtest.sll (::circt::rtgtest::SLL) ¶
Syntax:
operation ::= `rtgtest.sll` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.slli (::circt::rtgtest::SLLI) ¶
Syntax:
operation ::= `rtgtest.slli` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 5-bit immediate |
rtgtest.slt (::circt::rtgtest::SLT) ¶
Syntax:
operation ::= `rtgtest.slt` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.slti (::circt::rtgtest::SLTI) ¶
Syntax:
operation ::= `rtgtest.slti` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.sltiu (::circt::rtgtest::SLTIU) ¶
Syntax:
operation ::= `rtgtest.sltiu` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
rtgtest.sltu (::circt::rtgtest::SLTU) ¶
Syntax:
operation ::= `rtgtest.sltu` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.sra (::circt::rtgtest::SRA) ¶
Syntax:
operation ::= `rtgtest.sra` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.srai (::circt::rtgtest::SRAI) ¶
Syntax:
operation ::= `rtgtest.srai` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 5-bit immediate |
rtgtest.srl (::circt::rtgtest::SRL) ¶
Syntax:
operation ::= `rtgtest.srl` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.srli (::circt::rtgtest::SRLI) ¶
Syntax:
operation ::= `rtgtest.srli` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 5-bit immediate |
rtgtest.sub (::circt::rtgtest::SUB) ¶
Syntax:
operation ::= `rtgtest.sub` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.sw (::circt::rtgtest::SW) ¶
Syntax:
operation ::= `rtgtest.sw` $rs1 `,` $rs2 `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | a 12-bit immediate |
rtgtest.xor (::circt::rtgtest::XOR) ¶
Syntax:
operation ::= `rtgtest.xor` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.xori (::circt::rtgtest::XORI) ¶
Syntax:
operation ::= `rtgtest.xori` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface, RegisterAllocationOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | a 12-bit immediate |
Attributes ¶
CPUAttr ¶
This attribute represents a CPU referred to by the core ID
Syntax:
#rtgtest.cpu<
size_t # id
>
Parameters: ¶
| Parameter | C++ type | Description |
|---|---|---|
| id | size_t |
RegA0Attr ¶
Syntax: #rtgtest.a0
RegA1Attr ¶
Syntax: #rtgtest.a1
RegA2Attr ¶
Syntax: #rtgtest.a2
RegA3Attr ¶
Syntax: #rtgtest.a3
RegA4Attr ¶
Syntax: #rtgtest.a4
RegA5Attr ¶
Syntax: #rtgtest.a5
RegA6Attr ¶
Syntax: #rtgtest.a6
RegA7Attr ¶
Syntax: #rtgtest.a7
RegF0Attr ¶
Syntax: #rtgtest.f0
RegGpAttr ¶
Syntax: #rtgtest.gp
RegRaAttr ¶
Syntax: #rtgtest.ra
RegS0Attr ¶
Syntax: #rtgtest.s0
RegS1Attr ¶
Syntax: #rtgtest.s1
RegS2Attr ¶
Syntax: #rtgtest.s2
RegS3Attr ¶
Syntax: #rtgtest.s3
RegS4Attr ¶
Syntax: #rtgtest.s4
RegS5Attr ¶
Syntax: #rtgtest.s5
RegS6Attr ¶
Syntax: #rtgtest.s6
RegS7Attr ¶
Syntax: #rtgtest.s7
RegS8Attr ¶
Syntax: #rtgtest.s8
RegS9Attr ¶
Syntax: #rtgtest.s9
RegS10Attr ¶
Syntax: #rtgtest.s10
RegS11Attr ¶
Syntax: #rtgtest.s11
RegSpAttr ¶
Syntax: #rtgtest.sp
RegT0Attr ¶
Syntax: #rtgtest.t0
RegT1Attr ¶
Syntax: #rtgtest.t1
RegT2Attr ¶
Syntax: #rtgtest.t2
RegT3Attr ¶
Syntax: #rtgtest.t3
RegT4Attr ¶
Syntax: #rtgtest.t4
RegT5Attr ¶
Syntax: #rtgtest.t5
RegT6Attr ¶
Syntax: #rtgtest.t6
RegTpAttr ¶
Syntax: #rtgtest.tp
RegZeroAttr ¶
Syntax: #rtgtest.zero
Types ¶
CPUType ¶
Handle to a specific CPU
Syntax: !rtgtest.cpu
This type implements a specific context resource to test RTG operations
taking context resources as operands (such as on_context) and other things
requiring a concrete instance of a ContextResourceTypeInterface.
FloatRegisterType ¶
Represents a floating-point register
Syntax: !rtgtest.freg
IntegerRegisterType ¶
Represents an integer register
Syntax: !rtgtest.ireg