CIRCT'rtgtest' Dialect
types and operations for random test generation testing
This dialect defines the rtgtest dialect, which provides a set of
operation definitions to test the RTG dialect.
Operations ¶
rtgtest.constant_test (::circt::rtgtest::ConstantTestOp) ¶
Syntax:
operation ::= `rtgtest.constant_test` type($result) attr-dict
Traits: AlwaysSpeculatableImplTrait, ConstantLike
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attributes: ¶
| Attribute | MLIR Type | Description |
|---|---|---|
value | ::mlir::Attribute | any attribute |
Results: ¶
| Result | Description |
|---|---|
result | any type |
rtgtest.cpu_decl (::circt::rtgtest::CPUDeclOp) ¶
Declare a CPU
Syntax:
operation ::= `rtgtest.cpu_decl` $id attr-dict
This operation is used to test the ContextResourceOpInterface and passes
taking advantage of it.
Traits: AlwaysSpeculatableImplTrait, ConstantLike, FirstAttrDerivedResultType, HasParent<::circt::rtg::TargetOp>
Interfaces: ConditionallySpeculatable, ContextResourceOpInterface, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attributes: ¶
| Attribute | MLIR Type | Description |
|---|---|---|
id | ::circt::rtgtest::CPUAttr | this attribute represents a CPU referred to by the core ID |
Results: ¶
| Result | Description |
|---|---|
cpu | handle to a specific CPU |
rtgtest.immediate (::circt::rtgtest::ImmediateOp) ¶
Declare an immediate value
Syntax:
operation ::= `rtgtest.immediate` $imm attr-dict
Traits: AlwaysSpeculatableImplTrait, ConstantLike, FirstAttrDerivedResultType
Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Attributes: ¶
| Attribute | MLIR Type | Description |
|---|---|---|
imm | ::mlir::Attribute | represents a 12-bit immediate value or represents a 13-bit immediate value or represents a 21-bit immediate value or represents a 32-bit immediate value |
Results: ¶
| Result | Description |
|---|---|
result | any type |
rtgtest.rv32i.add (::circt::rtgtest::ADD) ¶
Syntax:
operation ::= `rtgtest.rv32i.add` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.and (::circt::rtgtest::AND) ¶
Syntax:
operation ::= `rtgtest.rv32i.and` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.beq (::circt::rtgtest::BEQ) ¶
Syntax:
operation ::= `rtgtest.rv32i.beq` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 13-bit immediate or a reference to a label |
rtgtest.rv32i.bge (::circt::rtgtest::BGE) ¶
Syntax:
operation ::= `rtgtest.rv32i.bge` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 13-bit immediate or a reference to a label |
rtgtest.rv32i.bgeu (::circt::rtgtest::BGEU) ¶
Syntax:
operation ::= `rtgtest.rv32i.bgeu` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 13-bit immediate or a reference to a label |
rtgtest.rv32i.blt (::circt::rtgtest::BLT) ¶
Syntax:
operation ::= `rtgtest.rv32i.blt` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 13-bit immediate or a reference to a label |
rtgtest.rv32i.bltu (::circt::rtgtest::BLTU) ¶
Syntax:
operation ::= `rtgtest.rv32i.bltu` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 13-bit immediate or a reference to a label |
rtgtest.rv32i.bne (::circt::rtgtest::BNE) ¶
Syntax:
operation ::= `rtgtest.rv32i.bne` $rs1 `,` $rs2 `,` $imm `:` qualified(type($imm)) attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 13-bit immediate or a reference to a label |
rtgtest.rv32i.ebreak (::circt::rtgtest::EBREAKOp) ¶
Syntax:
operation ::= `rtgtest.rv32i.ebreak` attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
rtgtest.rv32i.ecall (::circt::rtgtest::ECALLOp) ¶
Syntax:
operation ::= `rtgtest.rv32i.ecall` attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
rtgtest.rv32i.jalr (::circt::rtgtest::JALROp) ¶
Syntax:
operation ::= `rtgtest.rv32i.jalr` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.lb (::circt::rtgtest::LBOp) ¶
Syntax:
operation ::= `rtgtest.rv32i.lb` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.lbu (::circt::rtgtest::LBUOp) ¶
Syntax:
operation ::= `rtgtest.rv32i.lbu` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.lh (::circt::rtgtest::LHOp) ¶
Syntax:
operation ::= `rtgtest.rv32i.lh` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.lhu (::circt::rtgtest::LHUOp) ¶
Syntax:
operation ::= `rtgtest.rv32i.lhu` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.lw (::circt::rtgtest::LWOp) ¶
Syntax:
operation ::= `rtgtest.rv32i.lw` $rd `,` $rs `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.or (::circt::rtgtest::OR) ¶
Syntax:
operation ::= `rtgtest.rv32i.or` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.sb (::circt::rtgtest::SB) ¶
Syntax:
operation ::= `rtgtest.rv32i.sb` $rs1 `,` $rs2 `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.sh (::circt::rtgtest::SH) ¶
Syntax:
operation ::= `rtgtest.rv32i.sh` $rs1 `,` $rs2 `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.sll (::circt::rtgtest::SLL) ¶
Syntax:
operation ::= `rtgtest.rv32i.sll` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.slt (::circt::rtgtest::SLT) ¶
Syntax:
operation ::= `rtgtest.rv32i.slt` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.sltu (::circt::rtgtest::SLTU) ¶
Syntax:
operation ::= `rtgtest.rv32i.sltu` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.sra (::circt::rtgtest::SRA) ¶
Syntax:
operation ::= `rtgtest.rv32i.sra` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.srl (::circt::rtgtest::SRL) ¶
Syntax:
operation ::= `rtgtest.rv32i.srl` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.sub (::circt::rtgtest::SUB) ¶
Syntax:
operation ::= `rtgtest.rv32i.sub` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
rtgtest.rv32i.sw (::circt::rtgtest::SW) ¶
Syntax:
operation ::= `rtgtest.rv32i.sw` $rs1 `,` $rs2 `,` $imm attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rs1 | represents an integer register |
rs2 | represents an integer register |
imm | represents a 12-bit immediate |
rtgtest.rv32i.xor (::circt::rtgtest::XOR) ¶
Syntax:
operation ::= `rtgtest.rv32i.xor` $rd `,` $rs1 `,` $rs2 attr-dict
Traits: InstructionOpAdaptorTrait
Interfaces: InstructionOpInterface
Operands: ¶
| Operand | Description |
|---|---|
rd | represents an integer register |
rs1 | represents an integer register |
rs2 | represents an integer register |
Attributes ¶
CPUAttr ¶
this attribute represents a CPU referred to by the core ID
Syntax:
#rtgtest.cpu<
size_t # id
>
Parameters: ¶
| Parameter | C++ type | Description |
|---|---|---|
| id | size_t |
Imm12Attr ¶
represents a 12-bit immediate value
Syntax:
#rtgtest.imm12<
uint32_t # value
>
Parameters: ¶
| Parameter | C++ type | Description |
|---|---|---|
| value | uint32_t |
Imm13Attr ¶
represents a 13-bit immediate value
Syntax:
#rtgtest.imm13<
uint32_t # value
>
Parameters: ¶
| Parameter | C++ type | Description |
|---|---|---|
| value | uint32_t |
Imm21Attr ¶
represents a 21-bit immediate value
Syntax:
#rtgtest.imm21<
uint32_t # value
>
Parameters: ¶
| Parameter | C++ type | Description |
|---|---|---|
| value | uint32_t |
Imm32Attr ¶
represents a 32-bit immediate value
Syntax:
#rtgtest.imm32<
uint32_t # value
>
Parameters: ¶
| Parameter | C++ type | Description |
|---|---|---|
| value | uint32_t |
RegA0Attr ¶
Syntax: #rtgtest.a0
RegA1Attr ¶
Syntax: #rtgtest.a1
RegA2Attr ¶
Syntax: #rtgtest.a2
RegA3Attr ¶
Syntax: #rtgtest.a3
RegA4Attr ¶
Syntax: #rtgtest.a4
RegA5Attr ¶
Syntax: #rtgtest.a5
RegA6Attr ¶
Syntax: #rtgtest.a6
RegA7Attr ¶
Syntax: #rtgtest.a7
RegGpAttr ¶
Syntax: #rtgtest.gp
RegRaAttr ¶
Syntax: #rtgtest.ra
RegS0Attr ¶
Syntax: #rtgtest.s0
RegS1Attr ¶
Syntax: #rtgtest.s1
RegS2Attr ¶
Syntax: #rtgtest.s2
RegS3Attr ¶
Syntax: #rtgtest.s3
RegS4Attr ¶
Syntax: #rtgtest.s4
RegS5Attr ¶
Syntax: #rtgtest.s5
RegS6Attr ¶
Syntax: #rtgtest.s6
RegS7Attr ¶
Syntax: #rtgtest.s7
RegS8Attr ¶
Syntax: #rtgtest.s8
RegS9Attr ¶
Syntax: #rtgtest.s9
RegS10Attr ¶
Syntax: #rtgtest.s10
RegS11Attr ¶
Syntax: #rtgtest.s11
RegSpAttr ¶
Syntax: #rtgtest.sp
RegT0Attr ¶
Syntax: #rtgtest.t0
RegT1Attr ¶
Syntax: #rtgtest.t1
RegT2Attr ¶
Syntax: #rtgtest.t2
RegT3Attr ¶
Syntax: #rtgtest.t3
RegT4Attr ¶
Syntax: #rtgtest.t4
RegT5Attr ¶
Syntax: #rtgtest.t5
RegT6Attr ¶
Syntax: #rtgtest.t6
RegTpAttr ¶
Syntax: #rtgtest.tp
RegZeroAttr ¶
Syntax: #rtgtest.zero
Types ¶
CPUType ¶
handle to a specific CPU
Syntax: !rtgtest.cpu
This type implements a specific context resource to test RTG operations
taking context resources as operands (such as on_context) and other things
requiring a concrete instance of a ContextResourceTypeInterface.
Imm12Type ¶
represents a 12-bit immediate
Syntax: !rtgtest.imm12
Imm13Type ¶
represents a 13-bit immediate
Syntax: !rtgtest.imm13
Imm21Type ¶
represents a 21-bit immediate
Syntax: !rtgtest.imm21
Imm32Type ¶
represents a 32-bit immediate
Syntax: !rtgtest.imm32
IntegerRegisterType ¶
represents an integer register
Syntax: !rtgtest.ireg